component

Si3933

Public Made by Adom

by adom

Nanjing Zhongke Microelectronics RF Transceiver ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentrf and wirelesssi3933factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
si3933 / README.md
History Download
Ray Publish 0.1.0 4b7e85d 10d ago

Si3933

Nanjing Zhongke Microelectronics · RF Transceiver ICs · TSSOP-16

Si3933 from Nanjing Zhongke Microelectronics, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input SPI chip-select digital input; SPI commands are programmed only while CS is held high, and SDO is tri-stated when CS is low.
2 SCL input SPI interface clock input for the 4-wire SPI, with a maximum operating frequency of 6 MHz and data sampled on the falling edge of SCLK.
3 SDI input SPI serial data input carrying the register write data, transmitted data and/or readable register address, sent MSB first.
4 SDO tri_state SPI serial data output carrying received data or the read value of the selected register; it is tri-stated when CS is low so that several devices can share the SDO bus.
5 VCC power_in Positive supply pin, specified at 2.4 V to 3.6 V (3 V typical) with an absolute maximum of 5 V, and decoupled with a battery capacitor CBAT (10 uF typical in the 125 kHz application).
6 GND power_in Negative supply pin, the 0 V reference of the supply voltage.
7 LF3P bidirectional Analog I/O for the LC resonator and input of antenna channel 3, with internal parallel tuning capacitance adjustable from 0 to 31 pF in 1 pF steps.
8 LF2P bidirectional Analog I/O for the LC resonator and input of antenna channel 2, with internal parallel tuning capacitance adjustable from 0 to 31 pF in 1 pF steps.
9 LF1P bidirectional Analog I/O for the LC resonator and input of antenna channel 1, with internal parallel tuning capacitance adjustable from 0 to 31 pF in 1 pF steps; its resonator is also used for the self-calibration of the RC oscillator.
10 LFN bidirectional Analog I/O serving as the common ground for antennas 1, 2 and 3.
11 XIN bidirectional Analog I/O crystal oscillator input; it must be connected to VCC when the internal RC oscillator or an external clock is used.
12 XOUT bidirectional Analog I/O crystal oscillator output for a 32.768 kHz crystal (25 to 45 kHz range); it is left floating for the internal RC oscillator and driven by the external clock source (25 to 45 kHz) when that option is used.
13 VSS power_in Substrate power pad tied to the negative supply, 0 V.
14 WAKE output Digital wake-up output (IRQ) that goes high on a valid wake-up; in manual wake-up mode it produces a 128 us interrupt pulse.
15 DAT output Digital data output carrying the demodulated signal (or decoded Manchester data when enabled), and showing the LC resonance frequency when LC_OSC_MUX is selected for tuning.
16 CL_DAT output Digital output carrying the Manchester-recovered clock, on whose rising edge DAT data is stable; it can also show the clock-generator frequency when DISPLAY_CLK is set.

Key specifications

Parameter Value
Manufacturer Nanjing Zhongke Microelectronics
Package TSSOP-16
Category RF And Wireless
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC supply voltage VCC -0.5 5 V 11
Input pin voltage VIN -0.5 5 V 11
Input current (latch-up immune) ISOURCE -100 100 mA latch-up immunity 11
Electrostatic discharge ESD -2 2 kV HBM 11
Total power dissipation (all inputs and outputs) Pt 0.07 mW all inputs and outputs 11
Storage temperature Tstrg -65 150 ℃ 11
Package body temperature Tbody 260 ℃ 11
Relative humidity (non-condensing) RHNC 5 85 % non-condensing 11
Supply voltage VCC 2.4 3 3.6 V 12
Supply voltage negative VSS 0 0 V 12
Ambient temperature TAMB -40 85 ℃ 12
SPI maximum operating frequency 6 MHz four-wire SPI 23
Capacitive load on CMOS output CL 400 pF 1MHz clock 12
Input leakage current ILAEK 100 nA 12
Tri-state leakage current IOZ 100 nA to VCC and VSS 12
Band 1 maximum input frequency F1MAX 150 kHz 13
Band 1 minimum input frequency F1MIN 95 kHz 13
Band 2 maximum input frequency F2MAX 95 kHz 13
Band 2 minimum input frequency F2MIN 65 kHz 13
Band 3 maximum input frequency F3MAX 65 kHz 13
Band 3 minimum input frequency F3MIN 40 kHz 13
Band 4 maximum input frequency F4MAX 40 kHz 13
Band 4 minimum input frequency F4MIN 23 kHz 13
Band 5 maximum input frequency F5MAX 23 kHz 13
Band 5 minimum input frequency F5MIN 15 kHz 13
Crystal oscillator frequency FXTAL 25 32.768 45 kHz depends on crystal 15
External clock frequency FEXTCL 25 45 kHz external clock source 15
RC oscillator frequency, uncalibrated FRCNCAL 25 32.768 45 kHz uncalibrated 15
RC oscillator maximum achievable frequency after calibration FRCCALMAX 45 kHz after calibration 15
RC oscillator minimum achievable frequency after calibration FRCCALMIN 23.75 kHz after calibration 15
LC oscillator minimum frequency FLCOMIN 15 kHz L=47mH, C=2.3nF 15
LC oscillator maximum frequency FLCOMAX 150 kHz L=7.2mH, C=150pF 15
Minimum equivalent parallel resistance RPARMIN 10 kΩ 15
LF1P maximum internal tuning capacitance LF1Ptuning 31 pF 1 pF step 15
LF2P maximum internal tuning capacitance LF2Ptuning 31 pF 1 pF step 15
LF3P maximum internal tuning capacitance LF3Ptuning 31 pF 1 pF step 15
Crystal equivalent series resistance 60 kΩ crystal oscillator 41
Crystal oscillator duty cycle 45 50 55 % 41
RC oscillator calibration time 65 cycles reference clock cycles 41
External clock input low level 0 V 42
External clock rise time 3 μs 43
External clock fall time 3 μs 43
CS rising edge to data sampling TCSCLK 150 ns 27
Data rising edge to data sampling TDCLK 100 ns 27
SCLK high time THCL 70 ns 27
SCLK period TCLK 166 ns 27
Data sampling to CS falling edge TCLKCS 150 ns 27
CS switching time TCST 500 ns 27

CAD (KiCad official)

  • Symbol: Si3933
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: si3933-etched.step / si3933-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si3933.step / si3933.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nanjing Zhongke Microelectronics datasheet (48 pp, sha256 c53116e9b1556a1a, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF