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SI3586DV-T1-E3-VB

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VBsemi Elec MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI3586DV-T1-E3-VB

VBsemi Elec · MOSFETs · TSOP-6

SI3586DV-T1-E3-VB from VBsemi Elec, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G1 input Gate of the N-channel MOSFET (VGS ±20 V maximum).
2 S2 passive Source of the P-channel MOSFET (VDS -20 V, continuous source current -1.05 A).
3 G2 input Gate of the P-channel MOSFET (VGS ±20 V maximum).
4 D2 passive Drain of the P-channel MOSFET (VDS -20 V, ID -3.4 A at TA = 25 °C).
5 S1 passive Source of the N-channel MOSFET (VDS 20 V, continuous source current 1.05 A).
6 D1 passive Drain of the N-channel MOSFET (VDS 20 V, ID 5.5 A at TA = 25 °C).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-Channel) VDS 20 V TA = 25 °C 1
Drain-Source Voltage (P-Channel) VDS -20 V TA = 25 °C 1
Gate-Source Voltage (N-Channel) VGS -20 20 V 1
Gate-Source Voltage (P-Channel) VGS -20 20 V 1
Continuous Drain Current (P-Channel) ID -3.4 A TA = 25 °C, TJ = 150 °C 1
Continuous Drain Current (P-Channel) ID -2.3 A TA = 70 °C, TJ = 150 °C 1
Continuous Source Current (Diode Conduction) (N-Channel) IS 1.05 A 1
Continuous Source Current (Diode Conduction) (P-Channel) IS -1.05 A 1
Maximum Power Dissipation PD 1.15 W TA = 25 °C 1
Maximum Power Dissipation PD 0.73 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient (surface mounted) RthJA 93 110 °C/W t ≤ 5 s 1
Maximum Junction-to-Ambient (surface mounted) RthJA 130 150 °C/W Steady State 1
Maximum Junction-to-Lead RthJL 75 90 °C/W Steady State 1
Gate Threshold Voltage (N-Channel) VGS(th) 0.5 V VDS = VGS, ID = 250 µA 2
Gate Threshold Voltage (P-Channel) VGS(th) -0.5 V VDS = VGS, ID = -250 µA 2
Gate-Body Leakage (N- and P-Channel) IGSS -100 100 nA VDS = 0 V, VGS = ±8 V 2
Zero Gate Voltage Drain Current (N-Channel) IDSS 1 µA VDS = 16 V, VGS = 0 2
Zero Gate Voltage Drain Current (P-Channel) IDSS -1 µA VDS = -16 V, VGS = 0 2
Zero Gate Voltage Drain Current at TJ = 55 °C (N-Channel) IDSS 5 µA VDS = 16 V, VGS = 0 V, TJ = 55 °C 2
Zero Gate Voltage Drain Current at TJ = 55 °C (P-Channel) IDSS -5 µA VDS = -16 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current (N-Channel) ID(on) 3.7 A VDS = 5 V, VGS = 10 V 2
Drain-Source On-State Resistance (N-Channel) RDS(on) 0.022 Ω VGS = 10 V, ID = 2.5 A 2
Drain-Source On-State Resistance (P-Channel) RDS(on) 0.055 Ω VGS = -10 V, ID = -1.8 A 2
Drain-Source On-State Resistance (N-Channel) RDS(on) 0.03 Ω VGS = 4.5 V, ID = 2.0 A 2
Diode Forward Voltage (N-Channel) VSD 0.81 1.1 V IS = 1.05 A, VGS = 0 V 2
Diode Forward Voltage (P-Channel) VSD -0.83 -1.1 V IS = -1.05 A, VGS = 0 V 2

CAD (KiCad official)

  • Symbol: SI3586DV-T1-E3-VB
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: si3586dv-t1-e3-vb-etched.step / si3586dv-t1-e3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si3586dv-t1-e3-vb.step / si3586dv-t1-e3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (10 pp, sha256 4414cd68c18f2599, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF