main
Ray Publish 0.1.0 01c2f72 17d ago
{
  "slug": "si3456ddv-t1-ge3-vb",
  "version": "0.1.0",
  "type": "component",
  "description": "VBsemi Elec MOSFETs, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "transistors-thyristors",
    "si3456ddv-t1-ge3-vb",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "si3456ddv-t1-ge3-vb.kicad_sym",
    "si3456ddv-t1-ge3-vb.kicad_mod",
    "si3456ddv-t1-ge3-vb.glb",
    "si3456ddv-t1-ge3-vb.step",
    "si3456ddv-t1-ge3-vb.lbr",
    "docs/hero.png",
    "docs/si3456ddv-t1-ge3-vb-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "si3456ddv-t1-ge3-vb-hero.glb",
    "si3456ddv-t1-ge3-vb-hero.overlay.json",
    "si3456ddv-t1-ge3-vb-etched.glb"
  ],
  "component": {
    "mpn": "SI3456DDV-T1-GE3-VB",
    "manufacturer": "VBsemi Elec",
    "package": "TSOP-6",
    "pin_count": 6,
    "category": "Transistors/Thyristors",
    "subcategory": "MOSFETs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603077045975343104",
    "parts": {
      "symbol": "si3456ddv-t1-ge3-vb.kicad_sym",
      "footprint": "si3456ddv-t1-ge3-vb.kicad_mod",
      "model_3d": "si3456ddv-t1-ge3-vb-hero.glb",
      "model_3d_plain": "si3456ddv-t1-ge3-vb-etched.glb",
      "model_3d_step": "si3456ddv-t1-ge3-vb-etched.step",
      "model_3d_step_plain": "si3456ddv-t1-ge3-vb.step",
      "lbr": "si3456ddv-t1-ge3-vb.lbr"
    },
    "distributor_links": {
      "lcsc": "C7463689"
    },
    "distributor_check": {
      "checked_at": "2026-10-17T18:39:23Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "D",
        "type": "passive",
        "description": "Drain, internally common with pins 2, 5 and 6; VDS max 30 V, continuous ID 6 A (package limited), pulsed IDM 25 A."
      },
      {
        "number": "2",
        "name": "D",
        "type": "passive",
        "description": "Drain, internally common with pins 1, 5 and 6; VDS max 30 V, continuous ID 6 A (package limited), pulsed IDM 25 A."
      },
      {
        "number": "3",
        "name": "G",
        "type": "input",
        "description": "Gate; VGS max ±20 V, threshold VGS(th) 0.5 V to 1.5 V at ID = 250 µA, gate leakage max ±100 nA."
      },
      {
        "number": "4",
        "name": "S",
        "type": "passive",
        "description": "Source; continuous source-drain diode current 2.1 A at TC = 25 °C, body diode VSD typ. 0.82 V (max 1.2 V) at IS = 4.4 A."
      },
      {
        "number": "5",
        "name": "D",
        "type": "passive",
        "description": "Drain, internally common with pins 1, 2 and 6; RDS(on) 0.023 Ω at VGS = 10 V and 0.027 Ω at VGS = 4.5 V."
      },
      {
        "number": "6",
        "name": "D",
        "type": "passive",
        "description": "Drain, internally common with pins 1, 2 and 5; RDS(on) 0.023 Ω at VGS = 10 V and 0.027 Ω at VGS = 4.5 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The top-view drawing is not in the extracted text. Pin-to-label mapping was inferred by pairing the ; Pin types use KiCad ERC classes: Drain and Source are marked passive because the datasheet gives no ; The datasheet states that pins 2, 3, 4 and 6 are drain pins, but the text does not say whether they "
        ],
        "pages_sent": 9,
        "cost_usd": 0.0507,
        "at": "2026-10-17T18:36:52"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603077045975343104",
        "pages": 9,
        "sha256": "0c7192ecd219b880",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 6,
        "described": 6,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "si3456ddv-t1-ge3-vb.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          3.05,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1c9b13e7787bad69d987f81501759be5faaee754f4ad55aa7da0fc2259cdb0ff",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "si3456ddv-t1-ge3-vb-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.8,
          3.05,
          1.1
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "16e6385fb12dc6100794863132fad2bda64849917948806eb062d797610f64b6",
        "checked": "2026-10-17",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}