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Ray Publish 0.1.0 f45444d 7d ago

SI3442BDV-T1-E3

Vishay Intertech · MOSFETs · TSOP-6

SI3442BDV-T1-E3 from Vishay Intertech, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D passive Drain terminal, electrically tied together with pins 2, 5 and 6; the device is rated for VDS = 20 V and continuous drain current ID of 4.2 A at TA = 25 °C (t ≤ 5 s).
2 D passive Drain terminal, electrically tied together with pins 1, 5 and 6; the device is rated for VDS = 20 V and continuous drain current ID of 4.2 A at TA = 25 °C (t ≤ 5 s).
3 G input Gate terminal; gate-source voltage VGS is limited to ±12 V.
4 S passive Source terminal; continuous source (diode conduction) current IS is rated 1.4 A for t ≤ 5 s and 0.72 A in steady state.
5 D passive Drain terminal, electrically tied together with pins 1, 2 and 6; the device is rated for VDS = 20 V and continuous drain current ID of 4.2 A at TA = 25 °C (t ≤ 5 s).
6 D passive Drain terminal, electrically tied together with pins 1, 2 and 5; the device is rated for VDS = 20 V and continuous drain current ID of 4.2 A at TA = 25 °C (t ≤ 5 s).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TSOP-6
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate Threshold Voltage VGS(th) 0.6 1.8 V VDS = VGS, ID = 250 µA 2
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±12 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 20 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 5 µA VDS = 20 V, VGS = 0 V, TJ = 70 °C 2
On-State Drain Current ID(on) 10 A VDS = 5 V, VGS = 4.5 V 2
On-State Drain Current ID(on) 4 A VDS = 5 V, VGS = 2.5 V 2
Drain-Source On-State Resistance RDS(on) 0.045 0.057 Ω VGS = 4.5 V, ID = 4 A 2
Drain-Source On-State Resistance RDS(on) 0.07 0.09 Ω VGS = 2.5 V, ID = 3.4 A 2
Diode Forward Voltage VSD 0.75 1.2 V IS = 1.6 A, VGS = 0 V 2
Total Gate Charge Qg 3 5 nC VDS = 10 V, VGS = 4.5 V, ID = 4.0 A 2
Turn-On Delay Time td(on) 35 55 ns VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 4.5 V, Rg = 6 Ω 2
Rise Time tr 50 75 ns VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 4.5 V, Rg = 6 Ω 2
Turn-Off Delay Time td(off) 20 30 ns VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 4.5 V, Rg = 6 Ω 2
Fall Time tf 15 25 ns VDD = 10 V, RL = 10 Ω, ID ≅ 1 A, VGEN = 4.5 V, Rg = 6 Ω 2
Source-Drain Reverse Recovery Time trr 30 60 ns IF = 1.6 A, dI/dt = 100 A/µs 2
Drain-Source Voltage VDS 20 V 1
Gate-Source Voltage VGS -12 12 V 1
Continuous Drain Current ID 4.2 A TJ = 150 °C, TA = 25 °C, t ≤ 5 s 1
Continuous Drain Current ID 3 A TJ = 150 °C, TA = 25 °C, steady state 1
Continuous Drain Current ID 3.4 A TJ = 150 °C, TA = 70 °C, t ≤ 5 s 1
Continuous Drain Current ID 2.4 A TJ = 150 °C, TA = 70 °C, steady state 1
Pulsed Drain Current IDM 20 A 1
Continuous Source Current (Diode Conduction) IS 1.4 A t ≤ 5 s 1
Continuous Source Current (Diode Conduction) IS 0.72 A steady state 1
Maximum Power Dissipation PD 1.67 W TA = 25 °C, t ≤ 5 s 1
Maximum Power Dissipation PD 0.86 W TA = 25 °C, steady state 1
Maximum Power Dissipation PD 1.07 W TA = 70 °C, t ≤ 5 s 1
Maximum Power Dissipation PD 0.55 W TA = 70 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 75 100 °C/W t ≤ 5 s 1
Maximum Junction-to-Ambient RthJA 120 145 °C/W steady state 1
Maximum Junction-to-Foot (Drain) RthJF 70 85 °C/W steady state 1

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper pins 1,2,5, and 6. The copper plane connects the drain pins 6

CAD (KiCad official)

  • Symbol: SI3442BDV-T1-E3
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: si3442bdv-t1-e3-etched.step / si3442bdv-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si3442bdv-t1-e3.step / si3442bdv-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 d7376b59d41baaf5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF