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SI2369BDS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23

SI2369BDS-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the P-channel MOSFET, rated for a gate-source voltage of -20 V / +16 V with a gate-source threshold VGS(th) between -1 V and -2.2 V.
2 S passive Source of the P-channel MOSFET, with continuous source-drain diode current IS limited to -2.1 A at TC = 25 °C and -1.1 A at TA = 25 °C (surface mounted on 1" x 1" FR4).
3 D passive Drain of the P-channel MOSFET, rated for a drain-source voltage VDS of -30 V and a continuous drain current ID of -7.5 A at TC = 25 °C (-5.6 A at TA = 25 °C).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS -30 V 1
Gate-source voltage VGS -20 16 V 1
Continuous drain current ID -7.5 A TJ = 150 °C, TC = 25 °C 1
Continuous drain current ID -6.3 A TJ = 150 °C, TC = 70 °C 1
Continuous drain current ID -5.6 A TJ = 150 °C, TA = 25 °C, notes b, c 1
Continuous drain current ID -4.4 A TJ = 150 °C, TA = 70 °C, notes b, c 1
Pulsed drain current IDM -50 A t = 100 μs 1
Continuous source-drain diode current IS -2.1 A TC = 25 °C 1
Continuous source-drain diode current IS -1.1 A TA = 25 °C, notes b, c 1
Maximum power dissipation PD 2.5 W TC = 25 °C 1
Maximum power dissipation PD 1.6 W TC = 70 °C 1
Maximum power dissipation PD 1.3 W TA = 25 °C, notes b, c 1
Maximum power dissipation PD 0.8 W TA = 70 °C, notes b, c 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Maximum junction-to-ambient (t ≤ 5 s) RthJA 75 100 °C/W note b; t ≤ 5 s 1
Maximum junction-to-case (drain), steady state RthJF 40 50 °C/W Steady state 1
Maximum junction-to-ambient, steady state RthJA 166 °C/W Steady state (note d) 1
Drain-source breakdown voltage VDS -30 V VGS = 0 V, ID = -250 μA 2
Gate-source threshold voltage VGS(th) -1 -2.2 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = -20 V / +16 V 2
Zero gate voltage drain current IDSS -1 μA VDS = -30 V, VGS = 0 V 2
Zero gate voltage drain current IDSS -15 μA VDS = -30 V, VGS = 0 V, TJ = 70 °C 2
On-state drain current ID(on) -10 A VDS -10 V, VGS = -10 V 2
Drain-source on-state resistance RDS(on) 0.0225 0.027 Ω VGS = -10 V, ID = -5 A 2
Drain-source on-state resistance RDS(on) 0.0325 0.039 Ω VGS = -4.5 V, ID = -3 A 2
Total gate charge Qg 12.9 19.5 nC VDS = -15 V, VGS = -10 V, ID = -5.6 A 2
Total gate charge Qg 6.2 9.3 nC VDS = -15 V, VGS = -4.5 V, ID = -5.6 A 2
Gate resistance Rg 3.1 18.3 31 Ω f = 1 MHz 2
Turn-on delay time td(on) 12 24 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -10 V, Rg = 1 Ω 2
Rise time tr 6 12 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-off delay time td(off) 40 80 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -10 V, Rg = 1 Ω 2
Fall time tf 22 44 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-on delay time td(on) 25 50 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -4.5 V, Rg = 1 Ω 2
Rise time tr 55 110 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -4.5 V, Rg = 1 Ω 2
Fall time tf 25 50 ns VDD = -15 V, RL = 3.4 Ω, ID -4.4 A, VGEN = -4.5 V, Rg = 1 Ω 2
Continuous source-drain diode current IS -2.1 A TC = 25 °C 2
Pulse diode forward current ISM -50 A 2
Body diode voltage VSD -0.8 -1.2 V IS = -4.4 A, VGS = 0 V 2
Body diode reverse recovery time trr 19 38 ns IF = -4.4 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 8 16 nC 2

CAD (KiCad official)

  • Symbol: SI2369BDS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2369bds-t1-ge3-etched.step / si2369bds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2369bds-t1-ge3.step / si2369bds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 9ed0d3a52b254e41, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF