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Contents

README

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SI2333CDS-T1-E3

Vishay Intertech · MOSFETs · SOT-23

SI2333CDS-T1-E3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the P-channel MOSFET; gate-source voltage is rated ±8 V (VGS) in the absolute maximum ratings.
2 S passive Source terminal; the source-drain body diode is rated for 1.0 A continuous at TC = 25 °C and 20 A pulsed.
3 D passive Drain terminal; VDS is -12 V and continuous drain current is -5.1 A at TA = 25 °C (1" x 1" FR4 board), and per AN807 the drain pin also provides the main thermal path from the package to the PC board.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -12 V 1
Gate-Source Voltage VGS -8 8 V 1
Continuous Drain Current ID -7.1 A TJ = 150 °C; TC = 25 °C 1
Continuous Drain Current ID -5.7 A TJ = 150 °C; TC = 70 °C 1
Continuous Drain Current ID -5.1 A TJ = 150 °C; TA = 25 °C; notes b, c 1
Continuous Drain Current ID -4 A TJ = 150 °C; TA = 70 °C; notes b, c 1
Pulsed Drain Current IDM -20 A 1
Continuous Source-Drain Diode Current IS -1 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS -0.63 A TA = 25 °C; notes b, c 1
Maximum Power Dissipation PD 2.5 W TC = 25 °C 1
Maximum Power Dissipation PD 1.6 W TC = 70 °C 1
Maximum Power Dissipation PD 1.25 W TA = 25 °C; notes b, c 1
Maximum Power Dissipation PD 0.8 W TA = 70 °C; notes b, c 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 75 100 °C/W ≤ 5 s; notes b, d 1
Maximum Junction-to-Ambient (steady state) RthJA 166 °C/W Steady state; note d 1
Maximum Junction-to-Foot (Drain) RthJF 40 50 °C/W Steady state 1
Drain-Source Breakdown Voltage VDS -12 V VDS = 0 V, ID = -250 µA 2
Gate-Source Threshold Voltage VGS(th) -0.4 -1 V VDS = VGS, ID = -250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±8 V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = -12 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS -10 µA VDS = -12 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) -20 A VDS ≤ -5 V, VGS = -4.5 V 2
Drain-Source On-State Resistance RDS(on) 0.0285 0.035 Ω VGS = -4.5 V, ID = -5.1 A 2
Drain-Source On-State Resistance RDS(on) 0.036 0.045 Ω VGS = -2.5 V, ID = -4.5 A 2
Drain-Source On-State Resistance RDS(on) 0.046 0.059 Ω VGS = -1.8 V, ID = -2.0 A 2
Total Gate Charge Qg 15 25 nC VDS = -6 V, VGS = -4.5 V, ID = -5.1 A 2
Total Gate Charge Qg 9 15 nC VDS = -6 V, VGS = -2.5 V, ID = -5.1 A 2
Turn-On Delay Time td(on) 13 20 ns VDD = -6 V, RL = 6 Ω, ID = -1 A, VGEN = -4.5 V, RG = 1 Ω 2
Rise Time tr 35 60 ns VDD = -6 V, RL = 6 Ω, ID = -1 A, VGEN = -4.5 V, RG = 1 Ω 2
Turn-Off Delay Time td(off) 45 70 ns VDD = -6 V, RL = 6 Ω, ID = -1 A, VGEN = -4.5 V, RG = 1 Ω 2
Fall Time tf 12 20 ns VDD = -6 V, RL = 6 Ω, ID = -1 A, VGEN = -4.5 V, RG = 1 Ω 2
Continuous Source-Drain Diode Current IS -1 A TC = 25 °C 2
Pulse Diode Forward Current ISM -20 A 2
Body Diode Voltage VSD -0.7 -1.2 V IS = -1.0 A 2
Body Diode Reverse Recovery Time trr 32 50 ns IF = -1.0 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 20 40 nC IF = -1.0 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Drain-Source Breakdown Voltage Temperature Coefficient ΔVDS/TJ -13 mV/°C ID = -250 µA 2
Gate-Source Threshold Voltage Temperature Coefficient ΔVGS(th)/TJ 2.6 mV/°C 2
Forward Transconductance gfs 18.5 S VDS = -5 V, ID = -5.3 A 2
Input Capacitance Ciss 1225 pF VDS = -6 V, VGS = 0 V, f = 1 MHz 2
Output Capacitance Coss 315 pF VDS = -6 V, VGS = 0 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 260 pF VDS = -6 V, VGS = 0 V, f = 1 MHz 2
Gate-Source Charge Qgs 1.9 nC 2
Gate-Drain Charge Qgd 3.8 nC 2
Gate Resistance Rg 4 Ω f = 1 MHz 2
Reverse Recovery Fall Time ta 16 ns 2
Reverse Recovery Rise Time tb 16 ns 2

CAD (KiCad official)

  • Symbol: SI2333CDS-T1-E3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2333cds-t1-e3-etched.step / si2333cds-t1-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2333cds-t1-e3.step / si2333cds-t1-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 ad883b59f9362449, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF