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SI2329DS-T1-GE3

Public Made by Adom

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Vishay Intertech MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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SI2329DS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23

SI2329DS-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the P-channel MOSFET; the absolute maximum gate-source voltage VGS is ±5 V.
2 S passive Source of the P-channel MOSFET; the continuous source-drain diode current IS is -2.1 A at TC = 25 °C.
3 D passive Drain of the P-channel MOSFET; the drain-source voltage VDS is -8 V and the drain pin also provides the thermal connection to the PC board.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -8 V 1
Gate-Source Voltage VGS -5 5 V 1
Continuous Drain Current ID -6 A TJ = 150 °C, TC = 25 °C 1
Continuous Drain Current ID -5.3 A TA = 25 °C 1
Continuous Drain Current ID -4.2 A TA = 70 °C 1
Pulsed Drain Current IDM -20 A t = 300 µs 1
Continuous Source-Drain Diode Current IS -2.1 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS -1 A TA = 25 °C 1
Maximum Power Dissipation PD 2.5 W TC = 25 °C 1
Maximum Power Dissipation PD 1.6 W TC = 70 °C 1
Maximum Power Dissipation PD 1.25 W TA = 25 °C 1
Maximum Power Dissipation PD 0.8 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient (5 s) RthJA 75 100 °C/W t = 5 s 1
Maximum Junction-to-Foot (Drain) Steady State RthJF 40 50 °C/W Steady state 1
Gate-Source Threshold Voltage VGS(th) -0.35 -0.8 V VDS = VGS, ID = - 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 5 V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = - 8 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS -10 µA VDS = - 8 V, VGS = 0 V, TJ = 55 °C 2
Drain-Source Breakdown Voltage VDS -8 V VGS = 0 V, ID = - 250 µA 2
On-State Drain Current ID(on) -20 A VDS - 5 V, VGS = - 5.3 V 2
Drain-Source On-State Resistance RDS(on) 0.025 0.03 Ω VGS = - 4.5 V, ID = - 5.3 A 2
Drain-Source On-State Resistance RDS(on) 0.03 0.036 Ω VGS = - 2.5 V, ID = - 4.8 A 2
Drain-Source On-State Resistance RDS(on) 0.037 0.048 Ω VGS = - 1.8 V, ID = - 4.2 A 2
Drain-Source On-State Resistance RDS(on) 0.045 0.068 Ω VGS = - 1.5 V, ID = - 3.5 A 2
Drain-Source On-State Resistance RDS(on) 0.06 0.12 Ω VGS = - 1.2 V, ID = - 0.8 A 2
Body Diode Voltage VSD -0.8 -1.2 V IS = - 4.2 A 2
Body Diode Reverse Recovery Time trr 40 60 ns IF = - 4.2 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 26 39 nC IF = - 4.2 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Continuous Source-Drain Diode Current IS -2.1 A TC = 25 °C 2
Pulse Diode Forward Current ISM -20 A 2
Turn-On Delay Time td(on) 20 30 ns VDD = - 4 V, RL = 0.9, ID = - 4.2 A, VGEN = - 4.5 V, Rg = 1 2
Rise Time tr 22 33 ns VDD = - 4 V, RL = 0.9, ID = - 4.2 A, VGEN = - 4.5 V, Rg = 1 2
Turn-Off Delay Time td(off) 46 69 ns VDD = - 4 V, RL = 0.9, ID = - 4.2 A, VGEN = - 4.5 V, Rg = 1 2
Fall Time tf 20 30 ns VDD = - 4 V, RL = 0.9, ID = - 4.2 A, VGEN = - 4.5 V, Rg = 1 2
Gate Resistance Rg 0.8 4.2 8.4 Ω f = 1 MHz 2
Total Gate Charge Qg 19.3 29 nC VDS = - 4 V, VGS = - 4.5 V, ID = - 5.3 A 2
Total Gate Charge Qg 11.8 18 nC VDS = - 4 V, VGS = - 2.5 V, ID = - 5.3 A 2
Forward Transconductance gfs 2 S VDS = - 4 V, ID = - 5.3 A 2
Input Capacitance Ciss 1485 pF VDS = - 4 V, VGS = 0 V, f = 1 MHz 2
Output Capacitance Coss 480 pF VDS = - 4 V, VGS = 0 V, f = 1 MHz 2
Reverse Transfer Capacitance Crss 435 pF VDS = - 4 V, VGS = 0 V, f = 1 MHz 2
Gate-Source Charge Qgs 1.7 nC 2
Gate-Drain Charge Qgd 6.2 nC 2
Reverse Recovery Fall Time ta 17 ns 2
Reverse Recovery Rise Time tb 23 ns 2
Drain-Source Voltage Temperature Coefficient VDS/TJ -6 mV/°C ID = - 250 µA 2
Gate-Source Threshold Voltage Temperature Coefficient VGS(th)/TJ 2.3 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper pattern, a plane of copper overlies the drain pin and provides 8

CAD (KiCad official)

  • Symbol: SI2329DS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2329ds-t1-ge3-etched.step / si2329ds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2329ds-t1-ge3.step / si2329ds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (10 pp, sha256 77e40b5146813386, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF