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Contents

README

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SI2319DS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23-3

SI2319DS-T1-GE3 from Vishay Intertech, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal; gate-source threshold voltage VGS(th) = −1 V to −3.0 V (VDS = VGS, ID = −250 µA); maximum gate-source voltage VGS = ±20 V; gate-body leakage IGSS ≤ ±100 nA at VGS = ±20 V.
2 S passive Source terminal; continuous source current (body-diode conduction) IS = −1.0 A (5 s) / −0.62 A steady-state at TA = 25 °C; body-diode forward voltage VSD = −0.8 V typ / −1.2 V max at IS = −1.25 A, VGS = 0 V.
3 D passive Drain terminal; maximum drain-source voltage VDS = −40 V; continuous drain current ID = −3.0 A (5 s) at TA = 25 °C; RDS(on) = 0.082 Ω max at VGS = −10 V, ID = −3.0 A; zero-gate-voltage drain current IDSS ≤ −1 µA at VDS = −40 V.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23-3
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: SI2319DS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: si2319ds-t1-ge3-etched.step / si2319ds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2319ds-t1-ge3.step / si2319ds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (8 pp, sha256 c5e8ef779ed78650, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF