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README

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SI2319CDS-T1-BE3

Vishay Intertech · MOSFETs · SOT-23(TO-236)

SI2319CDS-T1-BE3 from Vishay Intertech, in a SOT-23(TO-236). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V, with threshold VGS(th) of -1.2 V min to -2.5 V max at ID = -250 µA.
2 S passive Source of the P-channel MOSFET; continuous source-drain diode current is -2.1 A at TC = 25 °C.
3 D passive Drain; drain-source voltage rated at -40 V, continuous drain current -4.4 A at TC = 25 °C and pulsed drain current -20 A.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23(TO-236)
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -40 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -4.4 A TC = 25 °C (TJ = 150 °C) 1
Continuous Drain Current ID -3.5 A TC = 70 °C (TJ = 150 °C) 1
Continuous Drain Current ID -3.1 A TA = 25 °C (footnotes b, c) 1
Continuous Drain Current ID -2.5 A TA = 70 °C (footnotes b, c) 1
Pulsed Drain Current IDM -20 A 1
Continuous Source-Drain Diode Current IS -2.1 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS -1 A TA = 25 °C (footnotes b, c) 1
Maximum Power Dissipation PD 2.5 W TC = 25 °C 1
Maximum Power Dissipation PD 1.6 W TC = 70 °C 1
Maximum Power Dissipation PD 1.25 W TA = 25 °C (footnotes b, c) 1
Maximum Power Dissipation PD 0.8 W TA = 70 °C (footnotes b, c) 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 75 100 °C/W t ≤ 5 s (footnotes b, d) 1
Maximum Junction-to-Ambient RthJA 166 °C/W Steady state (footnote d, text note) 1
Maximum Junction-to-Foot (Drain) RthJF 40 50 °C/W Steady state 1
Drain-Source Breakdown Voltage VDS -40 V VGS = 0 V, ID = -250 µA 2
Gate-Source Threshold Voltage VGS(th) -1.2 -2.5 V VDS = VGS, ID = -250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±20 V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = -40 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS -5 µA VDS = -40 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) -20 A VDS ≤ -5 V, VGS = -10 V 2
Drain-Source On-State Resistance RDS(on) 0.064 0.077 Ω VGS = -10 V, ID = -3.1 A 2
Drain-Source On-State Resistance RDS(on) 0.09 0.108 Ω VGS = -4.5 V, ID = -2.6 A 2
Total Gate Charge Qg 13.6 21 nC VDS = -20 V, VGS = -10 V, ID = -3.1 A 2
Total Gate Charge Qg 7 11 nC VDS = -20 V, VGS = -4.5 V, ID = -3.1 A 2
Gate Resistance Rg 0.8 4.3 8.6 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 40 60 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -4.5 V, Rg = 1 Ω 2
Rise Time tr 27 41 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 18 27 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -4.5 V, Rg = 1 Ω 2
Fall Time tf 10 20 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 8 16 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -10 V, Rg = 1 Ω 2
Rise Time tr 9 18 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -10 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 20 30 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -10 V, Rg = 1 Ω 2
Fall Time tf 8 16 ns VDD = -20 V, RL = 8 Ω, ID ≅ -2.5 A, VGEN = -10 V, Rg = 1 Ω 2
Continuous Source-Drain Diode Current IS -2.1 A TC = 25 °C 2
Body Diode Voltage VSD -0.8 -1.2 V IS = -2.5 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 17 26 ns IF = -2.5 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 9 18 nC IF = -2.5 A, dI/dt = 100 A/µs, TJ = 25 °C 2

CAD (KiCad official)

  • Symbol: SI2319CDS-T1-BE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23(TO-236) (KiCad packages3D, STEP)
  • 3D model files: si2319cds-t1-be3-etched.step / si2319cds-t1-be3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2319cds-t1-be3.step / si2319cds-t1-be3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 9021ea4f38d478f0, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF