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SI2318CDS-T1-BE3

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Vishay Intertech MOSFETs, SOT-23(TO-236). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SI2318CDS-T1-BE3

Vishay Intertech · MOSFETs · SOT-23(TO-236)

SI2318CDS-T1-BE3 from Vishay Intertech, in a SOT-23(TO-236). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the N-channel MOSFET; the datasheet gives a gate-source voltage limit of ±20 V and a gate-source threshold of 1.2 V to 2.5 V.
2 S passive Source of the N-channel MOSFET; the continuous source-drain diode current is rated at 1.75 A at TC = 25 °C and 1.04 A at TA = 25 °C, with a 20 A pulsed diode current.
3 D passive Drain of the N-channel MOSFET; the drain-source voltage is rated at 40 V and the continuous drain current at 5.6 A (TC = 25 °C, limited by the package).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23(TO-236)
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 40 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 5.6 A TJ = 150 °C; TC = 25 °C 1
Continuous drain current ID 4.5 A TJ = 150 °C; TC = 70 °C 1
Continuous drain current ID 4.3 A TA = 25 °C; surface mounted, t = 5 s 1
Continuous drain current ID 3.5 A TA = 70 °C; surface mounted, t = 5 s 1
Pulsed drain current IDM 20 A 1
Continuous source-drain diode current IS 1.75 A TC = 25 °C 1
Continuous source-drain diode current IS 1.04 A TA = 25 °C; surface mounted, t = 5 s 1
Maximum power dissipation PD 2.1 W TC = 25 °C 1
Maximum power dissipation PD 1.3 W TC = 70 °C 1
Maximum power dissipation PD 1.25 W TA = 25 °C; surface mounted, t = 5 s 1
Maximum power dissipation PD 0.8 W TA = 70 °C; surface mounted, t = 5 s 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C 1
Maximum junction-to-ambient RthJA 80 100 °C/W t ≤ 5 s; surface mounted (notes b, d) 1
Maximum junction-to-foot (drain) RthJF 40 60 °C/W Steady state 1
Maximum junction-to-ambient, steady state (note d) RthJA 125 °C/W Steady state 1
Drain-source breakdown voltage VDS 40 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 1.2 2.5 V VDS = VGS, ID = 250 μA 2
Gate-source leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 40 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 10 μA VDS = 40 V, VGS = 0 V, TJ = 70 °C 2
On-state drain current ID(on) 20 A VDS ≥ 5 V, VGS = 10 V 2
Drain-source on-state resistance RDS(on) 0.035 0.042 Ω VGS = 10 V, ID = 4.3 A 2
Drain-source on-state resistance RDS(on) 0.041 0.051 Ω VGS = 4.5 V, ID = 3.9 A 2
Total gate charge Qg 5.8 9 nC VDS = 20 V, VGS = 10 V, ID = 4.3 A 2
Total gate charge Qg 2.9 6 nC VDS = 20 V, VGS = 4.5 V, ID = 4.3 A 2
Gate resistance Rg 0.6 3.3 6.6 Ω f = 1 MHz 2
Turn-on delay time (VGEN = 4.5 V) td(on) 12 20 ns VDD = 20 V, RL = 5.7 Ω, ID 3.5 A, VGEN = 4.5 V, Rg = 1 2
Rise time (VGEN = 4.5 V) tr 50 75 ns 2
Turn-off delay time (VGEN = 4.5 V) td(off) 10 20 ns 2
Fall time (VGEN = 4.5 V) tf 8 16 ns 2
Turn-on delay time (VGEN = 10 V) td(on) 7 14 ns 2
Rise time (VGEN = 10 V) tr 20 30 ns 2
Turn-off delay time (VGEN = 10 V) td(off) 14 21 ns 2
Fall time (VGEN = 10 V) tf 8 16 ns 2
Continuous source-drain diode current IS 1.75 A TC = 25 °C 2
Pulse diode forward current ISM 20 A 2
Body diode voltage VSD 0.85 1.2 V IS = 3.5 A, VGS = 0 V 2
Body diode reverse recovery time trr 15 23 ns IF = 3.5 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 7 14 nC 2

CAD (KiCad official)

  • Symbol: SI2318CDS-T1-BE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23(TO-236) (KiCad packages3D, STEP)
  • 3D model files: si2318cds-t1-be3-etched.step / si2318cds-t1-be3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2318cds-t1-be3.step / si2318cds-t1-be3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 51b97edaff264c54, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF