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SI2312CDS-T1-GE3

Vishay Intertech · MOSFETs · SOT-23

SI2312CDS-T1-GE3 from Vishay Intertech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the N-channel MOSFET; gate-source voltage is rated at VGS = ±8 V (absolute maximum).
2 S passive Source of the N-channel MOSFET; continuous source-drain diode current is rated at 1.75 A at TC = 25 °C.
3 D passive Drain of the N-channel MOSFET; drain-source voltage is rated at 20 V with continuous drain current of 6 A at TC = 25 °C (package limited).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ±8 V 2
Gate-Source Threshold Voltage VGS(th) 0.45 1 V VDS = VGS, ID = 250 µA 2
Drain-Source On-State Resistance RDS(on) 0.0265 0.0318 Ω VGS = 4.5 V, ID = 5.0 A 2
Drain-Source On-State Resistance RDS(on) 0.0296 0.0356 Ω VGS = 2.5 V, ID = 4.7 A 2
Drain-Source On-State Resistance RDS(on) 0.0345 0.0414 Ω VGS = 1.8 V, ID = 4.3 A 2
Gate Resistance Rg 0.5 2.4 4.8 Ω f = 1 MHz 2
Total Gate Charge Qg 12 18 nC VDS = 10 V, VGS = 5 V, ID = 5.0 A 2
Total Gate Charge Qg 8.8 14 nC VDS = 10 V, VGS = 4.5 V, ID = 5.0 A 2
Turn-On Delay Time td(on) 8 16 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 17 26 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 31 47 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 8 16 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 5 10 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 5 V, Rg = 1 Ω 2
Rise Time tr 13 20 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 21 32 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 5 V, Rg = 1 Ω 2
Fall Time tf 6 12 ns VDD = 10 V, RL = 2.2 Ω, ID ≅ 4 A, VGEN = 5 V, Rg = 1 Ω 2
Body Diode Voltage VSD 0.75 1.2 V IS = 4 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 12 20 ns IF = 4 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 5 10 nC IF = 4 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Drain-Source Voltage VDS 20 V TA = 25 °C 1
Gate-Source Voltage VGS -8 8 V TA = 25 °C 1
Continuous Drain Current ID 6 A TJ = 150 °C, TC = 25 °C (package limited) 1
Continuous Drain Current ID 5.1 A TJ = 150 °C, TC = 70 °C 1
Continuous Drain Current ID 5 A TJ = 150 °C, TA = 25 °C 1
Continuous Drain Current ID 4 A TJ = 150 °C, TA = 70 °C 1
Pulsed Drain Current IDM 20 A 1
Continuous Source-Drain Diode Current IS 1.75 A TC = 25 °C 1
Continuous Source-Drain Diode Current IS 1.04 A TA = 25 °C 1
Maximum Power Dissipation PD 2.1 W TC = 25 °C 1
Maximum Power Dissipation PD 1.3 W TC = 70 °C 1
Maximum Power Dissipation PD 1.25 W TA = 25 °C 1
Maximum Power Dissipation PD 0.8 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 80 100 °C/W t ≤ 5 s 1
Maximum Junction-to-Ambient RthJA 125 °C/W Steady state (note d) 1
Maximum Junction-to-Foot (Drain) RthJF 40 60 °C/W Steady state 1

CAD (KiCad official)

  • Symbol: SI2312CDS-T1-GE3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: si2312cds-t1-ge3-etched.step / si2312cds-t1-ge3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); si2312cds-t1-ge3.step / si2312cds-t1-ge3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 57de5e1bf45de846, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF