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SI1900DL-T1-E3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SC-70-6(SOT-363). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSI1900DL-T1-E3
Vishay Intertech · MOSFETs · SC-70-6(SOT-363)
SI1900DL-T1-E3 from Vishay Intertech, in a SC-70-6(SOT-363). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel, 30 V VDS rating). |
| 2 | G1 | input | Gate of MOSFET 1, with a maximum gate-source voltage of ±20 V. |
| 3 | D2 | passive | Drain of MOSFET 2, rated 30 V VDS and 0.63 A continuous drain current (5 s) at TA = 25 °C. |
| 4 | S2 | passive | Source of MOSFET 2 (N-channel, 30 V VDS rating). |
| 5 | G2 | input | Gate of MOSFET 2, with a maximum gate-source voltage of ±20 V. |
| 6 | D1 | passive | Drain of MOSFET 1, rated 30 V VDS and 0.63 A continuous drain current (5 s) at TA = 25 °C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SC-70-6(SOT-363) |
| Category | Transistors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | 30 | V | TA = 25 °C | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | TA = 25 °C | 1 | |
| Continuous Drain Current, 5 s | ID | 0.63 | A | TJ = 150 °C, TA = 25 °C, 5 s | 1 | ||
| Continuous Drain Current, Steady State | ID | 0.59 | A | TJ = 150 °C, TA = 25 °C, steady state | 1 | ||
| Continuous Drain Current, 5 s | ID | 0.45 | A | TJ = 150 °C, TA = 85 °C, 5 s | 1 | ||
| Continuous Drain Current, Steady State | ID | 0.43 | A | TJ = 150 °C, TA = 85 °C, steady state | 1 | ||
| Pulsed Drain Current | IDM | 1 | A | 1 | |||
| Continuous Source Current (Diode Conduction), 5 s | IS | 0.25 | A | 5 s | 1 | ||
| Continuous Source Current (Diode Conduction), Steady State | IS | 0.23 | A | steady state | 1 | ||
| Maximum Power Dissipation, 5 s | PD | 0.3 | W | TA = 25 °C, 5 s | 1 | ||
| Maximum Power Dissipation, Steady State | PD | 0.27 | W | TA = 25 °C, steady state | 1 | ||
| Maximum Power Dissipation, 5 s | PD | 0.16 | W | TA = 85 °C, 5 s | 1 | ||
| Maximum Power Dissipation, Steady State | PD | 0.14 | W | TA = 85 °C, steady state | 1 | ||
| Operating Junction and Storage Temperature Range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Junction-to-Ambient Thermal Resistance, t ≤ 5 s | RthJA | 360 | 415 | °C/W | t ≤ 5 s | 1 | |
| Junction-to-Ambient Thermal Resistance, Steady State | RthJA | 400 | 460 | °C/W | Steady State | 1 | |
| Junction-to-Foot (Drain) Thermal Resistance | RthJF | 300 | 350 | °C/W | Steady State | 1 | |
| Gate Threshold Voltage | VGS(th) | 1 | 3 | V | VDS = VGS, ID = 250 µA | 2 | |
| Gate-Body Leakage | IGSS | -100 | 100 | nA | VDS = 0 V, VGS = ± 20 V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 30 V, VGS = 0 V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 5 | µA | VDS = 30 V, VGS = 0 V, TJ = 85 °C | 2 | ||
| On-State Drain Current | ID(on) | 1 | A | VDS ≥ 5 V, VGS = 10 V | 2 | ||
| Drain-Source On-State Resistance | RDS(on) | 0.41 | 0.48 | Ω | VGS = 10 V, ID = 0.59 A | 2 | |
| Drain-Source On-State Resistance | RDS(on) | 0.6 | 0.7 | Ω | VGS = 4.5 V, ID = 0.2 A | 2 | |
| Forward Transconductance | gfs | 0.75 | S | VDS = 10 V, ID = 0.59 A | 2 | ||
| Diode Forward Voltage | VSD | 0.8 | 1.2 | V | IS = 0.23 A, VGS = 0 V | 2 | |
| Total Gate Charge | Qg | 0.86 | 1.4 | nC | VDS = 15 V, VGS = 10 V, ID = 0.59 A | 2 | |
| Gate-Source Charge | Qgs | 0.24 | nC | VDS = 15 V, VGS = 10 V, ID = 0.59 A | 2 | ||
| Gate-Drain Charge | Qgd | 0.08 | nC | VDS = 15 V, VGS = 10 V, ID = 0.59 A | 2 | ||
| Turn-On Delay Time | td(on) | 5 | 10 | ns | VDD = 15 V, RL = 30 Ω, ID ≅ 0.5 A, VGEN = 10 V, Rg = 6 Ω | 2 | |
| Rise Time | tr | 8 | 15 | ns | VDD = 15 V, RL = 30 Ω, ID ≅ 0.5 A, VGEN = 10 V, Rg = 6 Ω | 2 | |
| Turn-Off Delay Time | td(off) | 8 | 15 | ns | VDD = 15 V, RL = 30 Ω, ID ≅ 0.5 A, VGEN = 10 V, Rg = 6 Ω | 2 | |
| Fall Time | tf | 7 | 15 | ns | VDD = 15 V, RL = 30 Ω, ID ≅ 0.5 A, VGEN = 10 V, Rg = 6 Ω | 2 | |
| Source-Drain Reverse Recovery Time | trr | 15 | 30 | ns | IF = 0.23 A, dI/dt = 100 A/µs | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | The 6-pin SC-70 evaluation board (EVB) measures 0.6 inches by 0.5 inches. The copper pad traces are the same as | 6 |
CAD (KiCad official)
- Symbol:
SI1900DL-T1-E3 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6(SOT-363) (KiCad packages3D, STEP)
- 3D model files:
si1900dl-t1-e3-etched.step/si1900dl-t1-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si1900dl-t1-e3.step/si1900dl-t1-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (9 pp, sha256
4335973df5d2d364, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).