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SI1427EDH-T1-GE3
Public Made by Adomby adom
Vishay Intertech MOSFETs, SOT-363-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| si1427edh-t1-ge3-etched.step | 8d ago |
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SI1427EDH-T1-GE3
Vishay Intertech · MOSFETs · SOT-363-6
SI1427EDH-T1-GE3 from Vishay Intertech, in a SOT-363-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 2, 5 and 6; VDS rated -20 V. |
| 2 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 1, 5 and 6; continuous drain current -2 A (package limited). |
| 3 | G | input | Gate of the P-channel MOSFET with built-in Zener ESD protection; VGS rated ±8 V. |
| 4 | S | passive | Source of the P-channel MOSFET; continuous source-drain diode current -2 A at TC = 25 °C. |
| 5 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 1, 2 and 6; pulsed drain current -8 A. |
| 6 | D | passive | Drain of the P-channel MOSFET, tied internally with pins 1, 2 and 5; four drain leads reduce on-resistance and thermal resistance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOT-363-6 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage | VDS | -20 | V | 1 | |||
| Gate-source voltage | VGS | -8 | 8 | V | 1 | ||
| Continuous drain current | ID | -2 | A | TC = 25 °C, notes a, e | 1 | ||
| Pulsed drain current | IDM | -8 | A | 1 | |||
| Continuous source-drain diode current | IS | -2 | A | TC = 25 °C, notes a, e | 1 | ||
| Continuous source-drain diode current | IS | -1.3 | A | TA = 25 °C, notes b, c | 1 | ||
| Maximum power dissipation | PD | 2.8 | W | TC = 25 °C | 1 | ||
| Maximum power dissipation | PD | 1.8 | W | TC = 70 °C | 1 | ||
| Maximum power dissipation | PD | 1.56 | W | TA = 25 °C, notes b, c | 1 | ||
| Maximum power dissipation | PD | 1 | W | TA = 70 °C, notes b, c | 1 | ||
| Operating junction and storage temperature range | TJ, Tstg | -55 | 150 | °C | 1 | ||
| Soldering recommendations (peak temperature) | 260 | °C | notes d, e | 1 | |||
| Maximum junction-to-ambient | RthJA | 60 | 80 | °C/W | t ≤ 5 s, notes b, d | 1 | |
| Maximum junction-to-ambient (steady state) | RthJA | 125 | °C/W | steady state, note d | 1 | ||
| Maximum junction-to-foot (drain) | RthJF | 34 | 45 | °C/W | steady state | 1 | |
| Drain-source breakdown voltage | VDS | -20 | V | VGS = 0 V, ID = -250 μA | 2 | ||
| Gate-source threshold voltage | VGS(th) | -0.4 | -1 | V | VDS = VGS, ID = -250 μA | 2 | |
| Gate-source leakage | IGSS | -6 | 6 | μA | VDS = 0 V, VGS = ± 8 V | 2 | |
| Gate-source leakage | IGSS | -0.5 | 0.5 | μA | VDS = 0 V, VGS = ± 4.5 V | 2 | |
| Zero gate voltage drain current | IDSS | -1 | μA | VDS = -20 V, VGS = 0 V | 2 | ||
| Zero gate voltage drain current | IDSS | -10 | μA | VDS = -20 V, VGS = 0 V, TJ = 55 °C | 2 | ||
| On-state drain current | ID(on) | -8 | A | VDS -5 V, VGS = -4.5 V | 2 | ||
| Drain-source on-state resistance | RDS(on) | 0.05 | 0.064 | Ω | VGS = -4.5 V, ID = -3 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.065 | 0.085 | Ω | VGS = -2.5 V, ID = -2 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.09 | 0.11 | Ω | VGS = -1.8 V, ID = -1 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 0.11 | 0.165 | Ω | VGS = -1.5 V, ID = -0.5 A | 2 | |
| Total gate charge | Qg | 14 | 21 | nC | VDS = -10 V, VGS = -8 V, ID = -5.3 A | 2 | |
| Total gate charge | Qg | 7.6 | 12 | nC | VDS = -10 V, VGS = -4.5 V, ID = -5.3 A | 2 | |
| Gate resistance | Rg | 400 | 2000 | 4000 | Ω | f = 1 MHz | 2 |
| Turn-on delay time | td(on) | 0.2 | 0.3 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 1 | 1.5 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -4.5 V, Rg = 1 Ω | 2 | |
| Turn-on delay time | td(on) | 0.09 | 0.14 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -8 V, Rg = 1 Ω | 2 | |
| Rise time | tr | 0.4 | 0.6 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -8 V, Rg = 1 Ω | 2 | |
| Turn-off delay time | td(off) | 5.2 | 7.8 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -8 V, Rg = 1 Ω | 2 | |
| Fall time | tf | 2.3 | 3.5 | μs | VDD = -10 V, RL = 2.3 Ω, ID -4.3 A, VGEN = -8 V, Rg = 1 Ω | 2 | |
| Continuous source-drain diode current | IS | -2 | A | TC = 25 °C | 2 | ||
| Pulse diode forward current | ISM | -8 | A | 2 | |||
| Body diode voltage | VSD | -0.8 | -1.2 | V | IS = -3 A, VGS = 0 V | 2 | |
| Body diode reverse recovery time | trr | 30 | 60 | ns | IF = -3 A, di/dt = 100 A/μs, TJ = 25 °C | 2 | |
| Body diode reverse recovery charge | Qrr | 20 | 40 | nC | IF = -3 A, di/dt = 100 A/μs, TJ = 25 °C | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | Single-Channel LITTLE FOOT SC-70 6-Pin MOSFET Copper Leadframe Version | 8 |
CAD (KiCad official)
- Symbol:
SI1427EDH-T1-GE3 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363-6 (KiCad packages3D, STEP)
- 3D model files:
si1427edh-t1-ge3-etched.step/si1427edh-t1-ge3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si1427edh-t1-ge3.step/si1427edh-t1-ge3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (12 pp, sha256
e89b71dd5d90dad5, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).