# SGM7SZ08YC5G

**SGMICRO** · Logic Gates · SC-70-5

SGM7SZ08YC5G from SGMICRO, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Input A; unused input must be held high or low and may not float. |
| 2 | B | input | Input B; unused input must be held high or low and may not float. |
| 3 | GND | power_in | Ground reference pin. |
| 4 | Y | output | Output; Y = A AND B per the function table. |
| 5 | VCC | power_in | Power supply pin; the device accepts 1.65V to 5.5V on this pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Range | VCC | 1.65 |  | 5.5 | V |  | 4 |
| Supply Voltage Data Retention |  | 1.5 |  | 5.5 | V |  | 4 |
| Input Voltage | VIN | 0 |  | 5.5 | V |  | 4 |
| Output Voltage | VOUT | 0 |  |  | V |  | 4 |
| Input Rise and Fall Times | tr, tf | 0 |  | 20 | ns/V | VCC = 1.8V, 2.5V ±0.2V | 4 |
| Input Rise and Fall Times | tr, tf | 0 |  | 10 | ns/V | VCC = 3.3V ±0.3V | 4 |
| Input Rise and Fall Times | tr, tf | 0 |  | 5 | ns/V | VCC = 5.0V ±0.5V | 4 |
| HIGH Level Output Voltage | VOH | 1.62 | 1.65 |  | V | VIN = VIH, IOH = -100µA, VCC = 1.65V | 4 |
| HIGH Level Output Voltage | VOH | 1.77 | 1.8 |  | V | VIN = VIH, IOH = -100µA, VCC = 1.80V | 4 |
| HIGH Level Output Voltage | VOH | 2.27 | 2.3 |  | V | VIN = VIH, IOH = -100µA, VCC = 2.30V | 4 |
| HIGH Level Output Voltage | VOH | 2.97 | 3 |  | V | VIN = VIH, IOH = -100µA, VCC = 3.00V | 4 |
| HIGH Level Output Voltage | VOH | 4.47 | 4.5 |  | V | VIN = VIH, IOH = -100µA, VCC = 4.50V | 4 |
| HIGH Level Output Voltage | VOH | 1.46 | 1.55 |  | V | IOH = -4mA, VCC = 1.65V | 4 |
| HIGH Level Output Voltage | VOH | 2.03 | 2.18 |  | V | IOH = -8mA, VCC = 2.30V | 4 |
| HIGH Level Output Voltage | VOH | 2.51 | 2.81 |  | V | IOH = -16mA, VCC = 3.00V | 4 |
| HIGH Level Output Voltage | VOH | 2.34 | 2.7 |  | V | IOH = -24mA, VCC = 3.00V | 4 |
| HIGH Level Output Voltage | VOH | 4.01 | 4.2 |  | V | IOH = -32mA, VCC = 4.50V | 4 |
| LOW Level Output Voltage | VOL |  | 0 | 0.02 | V | VIN = VIL, IOL = 100µA, VCC = 1.65V | 4 |
| LOW Level Output Voltage | VOL |  | 0.06 | 0.11 | V | IOL = 4mA, VCC = 1.65V | 4 |
| LOW Level Output Voltage | VOL |  | 0.09 | 0.17 | V | IOL = 8mA, VCC = 2.30V | 4 |
| LOW Level Output Voltage | VOL |  | 0.16 | 0.32 | V | IOL = 16mA, VCC = 3.00V | 4 |
| LOW Level Output Voltage | VOL |  | 0.24 | 0.49 | V | IOL = 24mA, VCC = 3.00V | 4 |
| LOW Level Output Voltage | VOL |  | 0.29 | 0.55 | V | IOL = 32mA, VCC = 4.50V | 4 |
| Input Leakage Current | IIN | -5 | 0.1 | 5 | μA | VIN = 5.5V, GND; VCC = 0 to 5.5V | 4 |
| Power Off Leakage Current | IOFF |  | 0.1 | 5 | μA | VIN or VOUT = 5.5V; VCC = 0 | 4 |
| Quiescent Supply Current | ICC |  | 0.1 | 10 | μA | VIN = 5.5V, GND; VCC = 1.65 to 5.5V | 4 |
| Operating Temperature Range |  | -40 |  | 85 | ℃ |  | 2 |
| Supply Voltage, VCC | VCC | -0.5 |  | 6 | V |  | 2 |
| DC Input Voltage | VIN | -0.5 |  | 6 | V |  | 2 |
| DC Output Voltage | VOUT | -0.5 |  | 6 | V |  | 2 |
| DC Input Diode Current | IIK | -50 |  |  | mA | VIN < -0.5V | 2 |
| DC Output Diode Current | IOK | -50 |  |  | mA | VOUT < -0.5V | 2 |
| DC Output Current | IOUT | -50 |  | 50 | mA |  | 2 |
| DC VCC or Ground Current | ICC or IGND | -50 |  | 50 | mA |  | 2 |
| Junction Temperature |  |  |  | 150 | ℃ |  | 2 |
| Storage Temperature Range |  | -65 |  | 150 | ℃ |  | 2 |
| Lead Temperature |  |  |  | 260 | ℃ | Soldering, 10s | 2 |
| Propagation Delay | tPHL, tPLH |  | 8.8 |  | ns | VCC = 1.65V; CL = 15pF, RL = 1MΩ, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 7.2 |  | ns | VCC = 1.80V; CL = 15pF, RL = 1MΩ, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 4.1 |  | ns | VCC = 2.50V ± 0.20V; CL = 15pF, RL = 1MΩ, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 3.2 |  | ns | VCC = 3.30V ± 0.30V; CL = 15pF, RL = 1MΩ, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 2.6 |  | ns | VCC = 5.00V ± 0.50V; CL = 15pF, RL = 1MΩ, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 3.6 |  | ns | VCC = 3.30V ± 0.30V; CL = 50pF, RL = 500Ω, Figure 1, Figure 2 | 5 |
| Propagation Delay | tPHL, tPLH |  | 2.8 |  | ns | VCC = 5.00V ± 0.50V; CL = 50pF, RL = 500Ω, Figure 1, Figure 2 | 5 |
| Input Capacitance | CIN |  | 4 |  | pF | VCC = 0V | 5 |
| Power Dissipation Capacitance | CPD |  | 19 |  | pF | VCC = 3.30V; Figure 3 | 5 |
| Power Dissipation Capacitance | CPD |  | 20 |  | pF | VCC = 5.00V; Figure 3 | 5 |

## CAD (KiCad official)

- Symbol: `SGM7SZ08YC5G`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files: `sgm7sz08yc5g-etched.step` / `sgm7sz08yc5g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sgm7sz08yc5g.step` / `sgm7sz08yc5g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SGMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040261539880960) (12 pp, sha256 `8310bc5a2c86dc94`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sgm7sz08yc5g-datasheet.pdf)