component
SGM7222YWQ10
Public Made by Adomby adom
SGMICRO Operational Amplifier, QFN-10(1.4x1.8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SGM7222YWQ10
SGMICRO · Operational Amplifier · QFN-10(1.4x1.8)
SGM7222YWQ10 from SGMICRO, in a QFN-10(1.4x1.8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HSD1+ | passive | Analog switch port HSD1+ of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 2 | HSD2+ | passive | Analog switch port HSD2+ of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 3 | D+ | passive | USB D+ data port of the switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 4 | GND | power_in | Ground reference for the device (0 V). |
| 5 | D- | passive | USB D- data port of the switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 6 | HSD2- | passive | Analog switch port HSD2- of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 7 | HSD1- | passive | Analog switch port HSD1- of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 8 | OE | input | Enable control pin; logic high (VIH min 1.6 V) turns both switch paths OFF, and logic low is VIL max 0.5 V. |
| 9 | V+ | power_in | Positive power supply, specified 1.8 V to 4.3 V with an absolute maximum of 4.6 V to GND. |
| 10 | S | input | Select input that chooses between the HSD1± and HSD2± channels when OE is low, with VIH min 1.6 V and VIL max 0.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | QFN-10(1.4x1.8) |
| Category | Amplifiers/Comparators |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog I/O Voltage (HSD1+, HSD1-, HSD2+, HSD2-) | VIS | 0 | V | Full; max printed as V+ | 4 | ||
| On-Resistance | RON | 4.5 | 8.5 | Ω | +25℃; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 | |
| On-Resistance | RON | 9 | Ω | Full; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 | ||
| On-Resistance Match Between Channels | ΔRON | 0.15 | 0.6 | Ω | +25℃; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 | |
| On-Resistance Match Between Channels | ΔRON | 1.6 | Ω | Full; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 | ||
| On-Resistance Flatness | RFLAT(ON) | 1.5 | 2 | Ω | +25℃; V+ = 3V, VIS = 0V to 1V, ID = 8mA, Test Circuit 1 | 4 | |
| On-Resistance Flatness | RFLAT(ON) | 2.6 | Ω | Full; V+ = 3V, VIS = 0V to 1V, ID = 8mA, Test Circuit 1 | 4 | ||
| Power Off Leakage Current (D+, D-) | IOFF | 1 | μA | Full; V+ = 0V, VD = 0V to 3.6V, VS, VOE = 0V or 3.6V | 4 | ||
| Increase in I+ per Control Voltage | ICCT | 5 | μA | Full; V+ = 3.6V, VS or VOE = 2.6V | 4 | ||
| Source Off Leakage Current | IHSD2(OFF), IHSD1(OFF) | 1 | μA | Full; V+ = 3.6V, VIS = 3.3V/0.3V, VD = 0.3V/3.3V | 4 | ||
| Channel On Leakage Current | IHSD2(ON), IHSD1(ON) | 1 | μA | Full; V+ = 3.6V, VIS = 3.3V/0.3V, VD = 3.3V/0.3V or floating | 4 | ||
| Input High Voltage | VIH | 1.6 | V | Full | 4 | ||
| Input Low Voltage | VIL | 0.5 | V | Full | 4 | ||
| Input Leakage Current | IIN | 1 | μA | Full; V+ = 3V, VS, VOE = 0V or V+ | 4 | ||
| Power Supply Range | V+ | 1.8 | 4.3 | V | Full | 4 | |
| Power Supply Current | I+ | 1 | μA | Full; V+ = 3V, VS, VOE = 0V or V+ | 4 | ||
| Operating Temperature Range | -40 | 85 | ℃ | 2 | |||
| V+ to GND | V+ | 0 | 4.6 | V | 2 | ||
| Analog, Digital Voltage Range | -0.3 | V | Upper limit printed as (V+) + 0.3V | 2 | |||
| Continuous Current HSDn or Dn | -100 | 100 | mA | 2 | |||
| Peak Current HSDn or Dn | -150 | 150 | mA | 2 | |||
| Junction Temperature | 150 | ℃ | 2 | ||||
| Storage Temperature Range | -65 | 150 | ℃ | 2 | |||
| Lead Temperature (Soldering) | 260 | ℃ | 10s | 2 |
CAD (KiCad official)
- Symbol:
SGM7222YWQ10 - Footprint:
Package_DFN_QFN:UQFN-10_1.4x1.8mm_P0.4mm - 3D model: QFN-10(1.4x1.8) (KiCad packages3D, STEP)
- 3D model files:
sgm7222ywq10-etched.step/sgm7222ywq10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm7222ywq10.step/sgm7222ywq10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (15 pp, sha256
1d2177604ac08239, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SGM7222YWQ10
**SGMICRO** · Operational Amplifier · QFN-10(1.4x1.8)
SGM7222YWQ10 from SGMICRO, in a QFN-10(1.4x1.8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HSD1+ | passive | Analog switch port HSD1+ of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 2 | HSD2+ | passive | Analog switch port HSD2+ of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 3 | D+ | passive | USB D+ data port of the switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 4 | GND | power_in | Ground reference for the device (0 V). |
| 5 | D- | passive | USB D- data port of the switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 6 | HSD2- | passive | Analog switch port HSD2- of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 7 | HSD1- | passive | Analog switch port HSD1- of the DPDT switch, with analog I/O range 0 V to V+ and continuous/peak current limits of ±100 mA / ±150 mA for HSDn or Dn. |
| 8 | OE | input | Enable control pin; logic high (VIH min 1.6 V) turns both switch paths OFF, and logic low is VIL max 0.5 V. |
| 9 | V+ | power_in | Positive power supply, specified 1.8 V to 4.3 V with an absolute maximum of 4.6 V to GND. |
| 10 | S | input | Select input that chooses between the HSD1± and HSD2± channels when OE is low, with VIH min 1.6 V and VIL max 0.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | QFN-10(1.4x1.8) |
| Category | Amplifiers/Comparators |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog I/O Voltage (HSD1+, HSD1-, HSD2+, HSD2-) | VIS | 0 | | | V | Full; max printed as V+ | 4 |
| On-Resistance | RON | | 4.5 | 8.5 | Ω | +25℃; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 |
| On-Resistance | RON | | | 9 | Ω | Full; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 |
| On-Resistance Match Between Channels | ΔRON | | 0.15 | 0.6 | Ω | +25℃; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 |
| On-Resistance Match Between Channels | ΔRON | | | 1.6 | Ω | Full; V+ = 3V, VIS = 0V to 0.4V, ID = 8mA, Test Circuit 1 | 4 |
| On-Resistance Flatness | RFLAT(ON) | | 1.5 | 2 | Ω | +25℃; V+ = 3V, VIS = 0V to 1V, ID = 8mA, Test Circuit 1 | 4 |
| On-Resistance Flatness | RFLAT(ON) | | | 2.6 | Ω | Full; V+ = 3V, VIS = 0V to 1V, ID = 8mA, Test Circuit 1 | 4 |
| Power Off Leakage Current (D+, D-) | IOFF | | | 1 | μA | Full; V+ = 0V, VD = 0V to 3.6V, VS, VOE = 0V or 3.6V | 4 |
| Increase in I+ per Control Voltage | ICCT | | | 5 | μA | Full; V+ = 3.6V, VS or VOE = 2.6V | 4 |
| Source Off Leakage Current | IHSD2(OFF), IHSD1(OFF) | | | 1 | μA | Full; V+ = 3.6V, VIS = 3.3V/0.3V, VD = 0.3V/3.3V | 4 |
| Channel On Leakage Current | IHSD2(ON), IHSD1(ON) | | | 1 | μA | Full; V+ = 3.6V, VIS = 3.3V/0.3V, VD = 3.3V/0.3V or floating | 4 |
| Input High Voltage | VIH | 1.6 | | | V | Full | 4 |
| Input Low Voltage | VIL | | | 0.5 | V | Full | 4 |
| Input Leakage Current | IIN | | | 1 | μA | Full; V+ = 3V, VS, VOE = 0V or V+ | 4 |
| Power Supply Range | V+ | 1.8 | | 4.3 | V | Full | 4 |
| Power Supply Current | I+ | | | 1 | μA | Full; V+ = 3V, VS, VOE = 0V or V+ | 4 |
| Operating Temperature Range | | -40 | | 85 | ℃ | | 2 |
| V+ to GND | V+ | 0 | | 4.6 | V | | 2 |
| Analog, Digital Voltage Range | | -0.3 | | | V | Upper limit printed as (V+) + 0.3V | 2 |
| Continuous Current HSDn or Dn | | -100 | | 100 | mA | | 2 |
| Peak Current HSDn or Dn | | -150 | | 150 | mA | | 2 |
| Junction Temperature | | | | 150 | ℃ | | 2 |
| Storage Temperature Range | | -65 | | 150 | ℃ | | 2 |
| Lead Temperature (Soldering) | | | | 260 | ℃ | 10s | 2 |
## CAD (KiCad official)
- Symbol: `SGM7222YWQ10`
- Footprint: `Package_DFN_QFN:UQFN-10_1.4x1.8mm_P0.4mm`
- 3D model: QFN-10(1.4x1.8) (KiCad packages3D, STEP)
- 3D model files: `sgm7222ywq10-etched.step` / `sgm7222ywq10-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sgm7222ywq10.step` / `sgm7222ywq10.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SGMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588919331342462976) (15 pp, sha256 `1d2177604ac08239`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sgm7222ywq10-datasheet.pdf)