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SGM61232XPS8G
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SGMICRO DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SGM61232XPS8G
SGMICRO · DC-DC Converters · SOIC-8
SGM61232XPS8G from SGMICRO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | Bootstrap input for the N-MOSFET gate driver supply; connect to SW with a 0.1μF ceramic capacitor, and the MOSFET turns off if the BOOT capacitor voltage drops below the BOOT-UVLO level. |
| 2 | VIN | power_in | Input supply voltage; connect to a 4V to 28V power source. |
| 3 | EN | input | Active-high enable input that floats or pulls up to enable and is pulled below 1.08V to disable the device, with VIN UVLO programmable through a resistor divider from VIN. |
| 4 | SS | input | Soft-start input where an external capacitor on SS programs the output rise time during startup. |
| 5 | VSENSE | input | Transconductance error amplifier inverting input used as the feedback input to sense and regulate VOUT, with output voltage set by a resistor divider from the output. |
| 6 | COMP | output | Error amplifier output, internally connected to the PWM comparator input, with the compensation network placed between COMP and GND. |
| 7 | GND | power_in | Ground pin. |
| 8 | SW | power_out | Switching node and source of the internal MOSFET, connected to the catch diode cathode, the bootstrap capacitor and the inductor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Input Voltage | VIN | 4 | 28 | V | 4 | ||
| Internal UVLO Threshold, Rising | VUVLO | 3.45 | 3.7 | V | Rising | 4 | |
| Internal UVLO Threshold, Falling | VUVLO | 3 | 3.17 | 3.4 | V | Falling | 4 |
| Shutdown Supply Current | ISHDN | 1.2 | 2.5 | μA | EN = 0V, VIN = 12V | 4 | |
| Operating Supply Current (Non-switching) | IQ | 120 | 180 | μA | VSENSE = 1V, VIN = 12V | 4 | |
| Enable Threshold, Rising | VEN_TH | 1.25 | 1.35 | V | Rising | 4 | |
| Enable Threshold, Falling | VEN_TH | 1.01 | 1.08 | 1.16 | V | Falling | 4 |
| Voltage Reference | VREF | 0.778 | 0.8 | 0.832 | V | 4 | |
| High-side MOSFET On-Resistance | RDSON | 85 | 150 | mΩ | BOOT-SW = 3V, VIN = 4V | 4 | |
| High-side MOSFET On-Resistance | RDSON | 77 | 140 | mΩ | BOOT-SW = 5V, VIN = 12V | 4 | |
| Current Limit Threshold | ILIMIT | 4.6 | 5.5 | A | VIN = 12V, TJ = +25℃ | 4 | |
| Error Amplifier Source/Sink Current | Igm | -7 | 7 | μA | VCOMP = 1V, 100mV input overdrive | 4 | |
| Switching Frequency | fSW | 400 | 540 | 700 | kHz | VIN = 12V, TJ = +25℃ | 4 |
| Input Voltage Range | 4 | 28 | V | 2 | |||
| Operating Ambient Temperature Range | -40 | 125 | ℃ | 2 | |||
| VIN Voltage | -0.3 | 30 | V | 2 | |||
| EN Voltage | -0.3 | 6 | V | 2 | |||
| VSENSE, COMP Voltages | -0.3 | 3 | V | 2 | |||
| SS Voltage | -0.3 | 5 | V | 2 | |||
| BOOT-SW Voltage | 6 | V | 2 | ||||
| SW Voltage | -0.6 | 30 | V | 2 | |||
| SW Voltage 10ns Transient | -5 | V | 10ns transient | 2 | |||
| Junction Temperature | TJ | 150 | ℃ | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | ℃ | 2 | ||
| Lead Temperature (Soldering, 10s) | 260 | ℃ | 10s soldering | 2 | |||
| ESD Susceptibility HBM | 3000 | V | HBM | 2 | |||
| ESD Susceptibility CDM | 1000 | V | CDM | 2 |
CAD (KiCad official)
- Symbol:
SGM61232XPS8G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
sgm61232xps8g-etched.step/sgm61232xps8g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm61232xps8g.step/sgm61232xps8g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (20 pp, sha256
337a4b9d006a902c, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SGM61232XPS8G
**SGMICRO** · DC-DC Converters · SOIC-8
SGM61232XPS8G from SGMICRO, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | output | Bootstrap input for the N-MOSFET gate driver supply; connect to SW with a 0.1μF ceramic capacitor, and the MOSFET turns off if the BOOT capacitor voltage drops below the BOOT-UVLO level. |
| 2 | VIN | power_in | Input supply voltage; connect to a 4V to 28V power source. |
| 3 | EN | input | Active-high enable input that floats or pulls up to enable and is pulled below 1.08V to disable the device, with VIN UVLO programmable through a resistor divider from VIN. |
| 4 | SS | input | Soft-start input where an external capacitor on SS programs the output rise time during startup. |
| 5 | VSENSE | input | Transconductance error amplifier inverting input used as the feedback input to sense and regulate VOUT, with output voltage set by a resistor divider from the output. |
| 6 | COMP | output | Error amplifier output, internally connected to the PWM comparator input, with the compensation network placed between COMP and GND. |
| 7 | GND | power_in | Ground pin. |
| 8 | SW | power_out | Switching node and source of the internal MOSFET, connected to the catch diode cathode, the bootstrap capacitor and the inductor. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Input Voltage | VIN | 4 | | 28 | V | | 4 |
| Internal UVLO Threshold, Rising | VUVLO | 3.45 | | 3.7 | V | Rising | 4 |
| Internal UVLO Threshold, Falling | VUVLO | 3 | 3.17 | 3.4 | V | Falling | 4 |
| Shutdown Supply Current | ISHDN | | 1.2 | 2.5 | μA | EN = 0V, VIN = 12V | 4 |
| Operating Supply Current (Non-switching) | IQ | | 120 | 180 | μA | VSENSE = 1V, VIN = 12V | 4 |
| Enable Threshold, Rising | VEN_TH | 1.25 | | 1.35 | V | Rising | 4 |
| Enable Threshold, Falling | VEN_TH | 1.01 | 1.08 | 1.16 | V | Falling | 4 |
| Voltage Reference | VREF | 0.778 | 0.8 | 0.832 | V | | 4 |
| High-side MOSFET On-Resistance | RDSON | | 85 | 150 | mΩ | BOOT-SW = 3V, VIN = 4V | 4 |
| High-side MOSFET On-Resistance | RDSON | | 77 | 140 | mΩ | BOOT-SW = 5V, VIN = 12V | 4 |
| Current Limit Threshold | ILIMIT | 4.6 | | 5.5 | A | VIN = 12V, TJ = +25℃ | 4 |
| Error Amplifier Source/Sink Current | Igm | -7 | | 7 | μA | VCOMP = 1V, 100mV input overdrive | 4 |
| Switching Frequency | fSW | 400 | 540 | 700 | kHz | VIN = 12V, TJ = +25℃ | 4 |
| Input Voltage Range | | 4 | | 28 | V | | 2 |
| Operating Ambient Temperature Range | | -40 | | 125 | ℃ | | 2 |
| VIN Voltage | | -0.3 | | 30 | V | | 2 |
| EN Voltage | | -0.3 | | 6 | V | | 2 |
| VSENSE, COMP Voltages | | -0.3 | | 3 | V | | 2 |
| SS Voltage | | -0.3 | | 5 | V | | 2 |
| BOOT-SW Voltage | | | | 6 | V | | 2 |
| SW Voltage | | -0.6 | | 30 | V | | 2 |
| SW Voltage 10ns Transient | | -5 | | | V | 10ns transient | 2 |
| Junction Temperature | TJ | | | 150 | ℃ | | 2 |
| Storage Temperature Range | TSTG | -65 | | 150 | ℃ | | 2 |
| Lead Temperature (Soldering, 10s) | | | | 260 | ℃ | 10s soldering | 2 |
| ESD Susceptibility HBM | | | | 3000 | V | HBM | 2 |
| ESD Susceptibility CDM | | | | 1000 | V | CDM | 2 |
## CAD (KiCad official)
- Symbol: `SGM61232XPS8G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sgm61232xps8g-etched.step` / `sgm61232xps8g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sgm61232xps8g.step` / `sgm61232xps8g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SGMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590891954937425920) (20 pp, sha256 `337a4b9d006a902c`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sgm61232xps8g-datasheet.pdf)