component
SGM6012-ADJYTN5G
Public Made by Adomby adom
SGMICRO DC-DC Converters, TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
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| viewers | 17d ago |
| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
| sgm6012-adjytn5g-etched.glb | 17d ago |
| sgm6012-adjytn5g-etched.step | 17d ago |
| sgm6012-adjytn5g-hero.glb | 17d ago |
| sgm6012-adjytn5g-hero.overlay.json | 17d ago |
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SGM6012-ADJYTN5G
SGMICRO · DC-DC Converters · TSOT-23-5
SGM6012-ADJYTN5G from SGMICRO, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RUN | input | Run control input: forcing it above 1.5V enables the part and forcing it below 0.3V shuts the device down, drawing <1µA supply current in shutdown; do not leave RUN floating. |
| 2 | GND | power_in | Ground pin. |
| 3 | SW | output | Switch node connection to the inductor, connected to the drains of the internal main and synchronous power MOSFET switches. |
| 4 | VIN | power_in | Supply voltage pin (2.5V to 5.5V input range), which must be closely decoupled to GND with a 4.7µF or greater ceramic capacitor. |
| 5 | VFB | input | Feedback input that receives the output voltage from an external resistive divider; the internal divider is disabled on the adjustable version (SGM6012-ADJ). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | TSOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 2.5 | 5.5 | V | 4 | ||
| Feedback Current | IVFB | -100 | 1 | 100 | nA | Full (-40℃ to +85℃); printed as ±1 (typ) and ±100 (max) | 4 |
| Regulated Feedback Voltage | VFB | 0.58 | 0.6 | 0.622 | V | Full (-40℃ to +85℃) | 4 |
| Regulated Feedback Voltage | VFB | 0.583 | 0.6 | 0.62 | V | +25℃ | 4 |
| Regulated Feedback Voltage | VFB | 0.582 | 0.6 | 0.621 | V | 0℃ ≤ TA ≤ +85℃ | 4 |
| Reference Voltage Line Regulation | ΔVFB | 0.1 | 0.6 | %/V | VIN = 2.5V to 5.5V, Full | 4 | |
| Output Voltage Line Regulation | ΔVOUT | 0.1 | 0.6 | %/V | VIN = 2.5V to 5.5V, Full | 4 | |
| Peak Inductor Current | IPK | 1 | 1.25 | A | VFB = 0.5V or VOUT = 90%, VIN = 3V, +25℃ | 4 | |
| SW Leakage Current | ISW | -1 | 0.01 | 1 | μA | VRUN = 0V, VSW = 0V or 5V, VIN = 5V, +25℃; printed as ±0.01 (typ) and ±1 (max) | 4 |
| Supply Current, PWM Mode | IS | 280 | 360 | μA | VFB = 0.5V or VOUT = 90%, ILOAD = 0A, +25℃ | 4 | |
| Supply Current, PFM Mode | IS | 30 | 56 | μA | VFB = 0.62V or VOUT = 103%, ILOAD = 0A | 4 | |
| Shutdown Supply Current | IS | 0.1 | 1 | μA | VRUN = 0V, VIN = 4.2V | 4 | |
| RUN Threshold High | VIH | 1.5 | V | Full | 4 | ||
| RUN Threshold Low | VIL | 0.3 | V | 4 | |||
| RUN Leakage Current | IRUN | -1 | 0.01 | 1 | μA | Full; printed as ±0.01 (typ) and ±1 (max) | 4 |
| Oscillator Frequency | fOSC | 1.3 | 1.6 | 1.9 | MHz | VFB = 0.6V or VOUT = 100%, Full | 4 |
| RDS(ON) of P-Channel FET | RPFET | 0.46 | 0.65 | Ω | ISW = 100mA, +25℃ | 4 | |
| RDS(ON) of N-Channel FET | RNFET | 0.36 | 0.56 | Ω | ISW = -100mA, +25℃ | 4 | |
| Output Voltage Programming Range (adjustable version) | VOUT | 0.6 | 5.5 | V | Set by external R1/R2 divider (figure note 0.6V ≤ VOUT ≤ 5.5V) | 12 | |
| Operating Temperature Range | TA | -40 | 85 | ℃ | 2 | ||
| Input Supply Voltage | VIN | -0.3 | 6 | V | 2 | ||
| RUN, VFB Voltages | -0.3 | V | Maximum printed as VIN (not a fixed number) | 2 | |||
| SW Voltage | -0.3 | V | Maximum printed as VIN + 0.3V (not a fixed number) | 2 | |||
| P-Channel Switch Source Current (DC) | 800 | mA | DC | 2 | |||
| N-Channel Switch Sink Current (DC) | 800 | mA | DC | 2 | |||
| Junction Temperature | TJ | 150 | ℃ | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | ℃ | 2 | ||
| ESD Susceptibility HBM | 4000 | V | HBM | 2 | |||
| ESD Susceptibility MM | 300 | V | MM | 2 |
CAD (KiCad official)
- Symbol:
SGM6012-ADJYTN5G - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
sgm6012-adjytn5g-etched.step/sgm6012-adjytn5g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm6012-adjytn5g.step/sgm6012-adjytn5g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (21 pp, sha256
bed72333127da59e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).