component
SGM41286YPS8G
Public Made by Adomby adom
SGMICRO DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SGM41286YPS8G
SGMICRO · DC-DC Converters · SOIC-8-EP
SGM41286YPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input for internal circuit; supply range 7V to 14V (absolute maximum -0.3V to 22.5V). |
| 2 | VLNB | power_out | Output for LNB powering (14V/19V nominal, 500mA); connect with a 100nF decoupling capacitor. |
| 3 | VSW | power_in | Input for powering the output stage (absolute maximum -0.3V to 25.5V). |
| 4 | VCP | passive | Charge pump storage output for internal use; connect with a 10nF storage capacitor (absolute maximum -0.3V to 30V). |
| 5 | LX | passive | Switch node of boost; connect with one end of a power inductor (absolute maximum -0.3V to 30V). |
| 6 | EN | input | Enable input; pull up to 1.1V~6V logic high to enable chip function, and pulses on it program drop compensation. |
| 7 | H/V | input | VLNB output voltage selection input; logic high (1.1V~6V) gives 19V nominal output, pull down or leave open for 14V nominal output. |
| 8 | EXTM | input | External 22kHz tone input and internal tone synthesizer enable; if input stays high for over 46μs an internal 22kHz tone is sent to the output. |
| 9 | GND | power_in | Exposed pad, ground of chip internal circuit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
SGM41286YPS8G - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
sgm41286yps8g-etched.step/sgm41286yps8g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm41286yps8g.step/sgm41286yps8g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (14 pp, sha256
f2e8e833b4c91f88, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SGM41286YPS8G
**SGMICRO** · DC-DC Converters · SOIC-8-EP
SGM41286YPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input for internal circuit; supply range 7V to 14V (absolute maximum -0.3V to 22.5V). |
| 2 | VLNB | power_out | Output for LNB powering (14V/19V nominal, 500mA); connect with a 100nF decoupling capacitor. |
| 3 | VSW | power_in | Input for powering the output stage (absolute maximum -0.3V to 25.5V). |
| 4 | VCP | passive | Charge pump storage output for internal use; connect with a 10nF storage capacitor (absolute maximum -0.3V to 30V). |
| 5 | LX | passive | Switch node of boost; connect with one end of a power inductor (absolute maximum -0.3V to 30V). |
| 6 | EN | input | Enable input; pull up to 1.1V~6V logic high to enable chip function, and pulses on it program drop compensation. |
| 7 | H/V | input | VLNB output voltage selection input; logic high (1.1V~6V) gives 19V nominal output, pull down or leave open for 14V nominal output. |
| 8 | EXTM | input | External 22kHz tone input and internal tone synthesizer enable; if input stays high for over 46μs an internal 22kHz tone is sent to the output. |
| 9 | GND | power_in | Exposed pad, ground of chip internal circuit. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `SGM41286YPS8G`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `sgm41286yps8g-etched.step` / `sgm41286yps8g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sgm41286yps8g.step` / `sgm41286yps8g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SGMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835832845627393) (14 pp, sha256 `f2e8e833b4c91f88`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sgm41286yps8g-datasheet.pdf)