component
SGM4056-6.8YPS8G
Public Made by Adomby adom
SGMICRO Battery Management, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 17d ago |
| viewers | 17d ago |
| package.json | 17d ago |
| page.json | 17d ago |
| README.md | 17d ago |
| sgm4056-6-8yps8g-etched.glb | 17d ago |
| sgm4056-6-8yps8g-etched.step | 17d ago |
| sgm4056-6-8yps8g-hero.glb | 17d ago |
| sgm4056-6-8yps8g-hero.overlay.json | 17d ago |
| sgm4056-6-8yps8g.glb | 17d ago |
| sgm4056-6-8yps8g.kicad_mod | 17d ago |
| sgm4056-6-8yps8g.kicad_sym | 17d ago |
| sgm4056-6-8yps8g.lbr | 17d ago |
| sgm4056-6-8yps8g.step | 17d ago |
SGM4056-6.8YPS8G
SGMICRO · Battery Management · SOIC-8-EP
SGM4056-6.8YPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input with an absolute maximum input voltage of 26.5V; a 1µF or larger X5R ceramic capacitor is recommended very close to the pin for decoupling. |
| 2 | PPR | output | Open-drain power presence indication that turns on when the input is above the POR threshold but below the OVP threshold, can sink at least 15mA, and has a maximum voltage rating of 5.5V. |
| 3 | CHG | output | Open-drain charge indication that outputs logic low when a charge cycle starts, goes high impedance at end-of-charge, can sink at least 15mA, and is high impedance when the charger is disabled. |
| 4 | EN | input | Logic enable input where driving high disables the charger and driving low or leaving it floating enables it, with an internal 200kΩ pull-down resistor. |
| 5 | GND | power_in | System ground. |
| 6 | IMIN | passive | End-of-charge current programming pin; a resistor to GND sets the EOC current, which should be programmed within 5% (or 10mA, whichever is higher) to 50% of IREF, with stability not guaranteed below that range. |
| 7 | IREF | passive | Charge-current programming and monitoring pin; a resistor to GND sets the charge current limit, should be placed very close to the pin, and the pin voltage tracks actual charge current (0V when disabled). |
| 8 | BAT | power_out | Charger output connected to the battery, requiring a 1µF or larger X5R ceramic capacitor for decoupling and stability; the BAT output is disabled when EN is driven high. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum Supply Voltage | VIN | 26.5 | V | 4 | |||
| Operating Supply Voltage (SGM4056-6.8) | VIN | 4.55 | 6.1 | V | 4 | ||
| Programmed Charge Current | IREF | 100 | 900 | mA | 4 | ||
| Operating Temperature Range | TA | -40 | 85 | ℃ | 2 | ||
| VIN to GND | VIN | -0.3 | 30 | V | 2 | ||
| PPR, CHG, EN, IMIN, IREF, BAT to GND | -0.3 | 6 | V | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | ℃ | 2 | ||
| Junction Temperature | TJ | 150 | ℃ | 2 | |||
| Lead Temperature (Soldering) | 260 | ℃ | 10 sec | 2 | |||
| ESD Susceptibility MM | 200 | V | MM | 2 | |||
| Package Thermal Resistance SOIC-8 (Exposed Pad) | θJA | 58 | ℃/W | SOIC-8 (Exposed Pad) | 2 | ||
| Rising POR Threshold | VPOR | 3.21 | 3.95 | 4.55 | V | VBAT = 3.0V, RIREF = 120kΩ, use PPR to indicate the comparator output. | 4 |
| Falling POR Threshold | VPOR | 2.86 | 3.6 | 4.35 | V | 4 | |
| VIN-BAT Offset Voltage Rising Edge | VOS | 110 | 200 | mV | VBAT = 4.5V, RIREF = 120kΩ, use PPR pin to indicate the comparator output. | 4 | |
| VIN-BAT Offset Voltage Falling Edge | VOS | 5 | 60 | mV | 4 | ||
| Over-Voltage Protection Threshold SGM4056-6.8 | VOVP | 6.1 | 6.8 | 7.26 | V | VBAT = 4.3V, RIREF = 120kΩ, use PPR to indicate the comparator output. | 4 |
| OVP Threshold Hysteresis SGM4056-6.8 | VOVPHYS | 140 | 220 | 300 | mV | 4 | |
| BAT Pin Sink Current (standby) | ISTANDBY | 1 | μA | Charger disabled or the input is floating | 4 | ||
| VIN Pin Supply Current (charger disabled) | IVIN | 200 | 275 | μA | VBAT = 4.3V, RIREF = 24.3kΩ, charger disabled | 4 | |
| VIN Pin Supply Current (charger enabled) | IVIN | 270 | 320 | μA | VBAT = 4.3V, RIREF = 24.3kΩ, charger enabled | 4 | |
| Output Voltage | VCH | 4.152 | 4.2 | 4.248 | V | RIREF = 24.3kΩ, 4.55V < VIN < 6.10V, charge current = 20mA | 4 |
| PMOS On Resistance | RDS(ON) | 0.7 | Ω | VBAT = 3.8V, charge current = 500mA, RIREF = 10kΩ | 4 | ||
| IREF Pin Output Voltage | VIREF | 1.162 | 1.215 | 1.262 | V | VBAT = 3.8V, RIREF = 120kΩ | 4 |
| Constant Charge Current | IREF | 440 | 500 | 560 | mA | RIREF = 24.3kΩ, VBAT = 2.8V to 3.8V | 4 |
| Trickle Charge Current | ITRK | 55 | 90 | 135 | mA | RIREF = 24.3kΩ, VBAT = 2.4V | 4 |
| End-of-Charge Current | IMIN | 20 | 40 | 75 | mA | RIREF = 24.3kΩ | 4 |
| EOC Rising Threshold | 315 | 370 | 435 | mA | RIREF = 24.3kΩ | 4 | |
| Preconditioning Charge Threshold Voltage | VMIN | 2.46 | 2.55 | 2.65 | V | RIREF = 24.3kΩ | 4 |
| Preconditioning Voltage Hysteresis | VMINHYS | 20 | 100 | 190 | mV | RIREF = 24.3kΩ | 4 |
| EN Pin Logic Input High | 1.5 | V | 5 | ||||
| EN Pin Logic Input Low | 0.8 | V | 5 | ||||
| EN Pin Internal Pull Down Resistance | 150 | 200 | 250 | kΩ | 5 | ||
| CHG Sink Current when LOW | ICHG | 15 | 24 | mA | Pin Voltage = 1V | 5 | |
| CHG Leakage Current when High Impedance | ICHG | 20 | μA | VCHG = 5.5V | 5 | ||
| PPR Sink Current when LOW | IPPR | 15 | 24 | mA | Pin Voltage = 1V | 5 | |
| PPR Leakage Current when High Impedance | IPPR | 20 | μA | VPPR = 5.5V | 5 | ||
| Charge Current Foldback Threshold | TFOLD | 115 | ℃ | 5 |
CAD (KiCad official)
- Symbol:
SGM4056-6.8YPS8G - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
sgm4056-6-8yps8g-etched.step/sgm4056-6-8yps8g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm4056-6-8yps8g.step/sgm4056-6-8yps8g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (20 pp, sha256
fa4372b73677a32d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).