component
SGM2202-3.3YN5G
Public Made by Adomby adom
SGMICRO Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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|---|---|
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| viewers | 16d ago |
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| page.json | 16d ago |
| README.md | 16d ago |
| sgm2202-3-3yn5g-etched.glb | 16d ago |
| sgm2202-3-3yn5g-etched.step | 16d ago |
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| sgm2202-3-3yn5g-hero.overlay.json | 16d ago |
| sgm2202-3-3yn5g.glb | 16d ago |
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SGM2202-3.3YN5G
SGMICRO · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SGM2202-3.3YN5G from SGMICRO, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply voltage pin; the datasheet recommends a 1μF or larger ceramic capacitor from VIN to ground placed as close as possible to the pin, and the recommended input voltage range is 2.7V to 36V. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable pin: drive high to turn the regulator on and low to turn it off, and it must be connected to VIN if enable functionality is not used. |
| 4 | BP | passive | Reference-noise bypass pin; an external CBP capacitor reduces output noise and should be placed very close to the pin for high PSRR. |
| 5 | VOUT | power_out | Regulator output pin; the datasheet recommends an effective output capacitance of 1μF to 10μF located very close to this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Accuracy | -2.5 | 2.5 | % | IOUT = 1mA, +25℃ | 4 | ||
| Ground Pin Current (No load) | 4.2 | 5.4 | µA | No load, +25℃ | 4 | ||
| Ground Pin Current (No load, full temperature) | 6.5 | µA | No load, Full (-40℃ to +85℃) | 4 | |||
| Maximum Output Current | 150 | mA | VIN = VOUT + 2V or 4V, whichever is greater, +25℃ | 4 | |||
| Dropout Voltage | VDROP | 1300 | 1840 | mV | IOUT = 150mA, VOUT ≥ 2.5V, +25℃ | 4 | |
| Dropout Voltage (full temperature) | VDROP | 2380 | mV | IOUT = 150mA, VOUT ≥ 2.5V, Full | 4 | ||
| Line Regulation | ΔVOUT/(VOUT×ΔVIN) | 0.005 | 0.01 | %/V | VIN = VOUT + 2V to 36V, IOUT = 1mA, VOUT ≥ 3.3V, +25℃ | 4 | |
| Load Regulation | ΔVOUT | 10 | 24 | mV | VIN = VOUT + 2V or 4V, IOUT = 1mA to 150mA, +25℃ | 4 | |
| Output Voltage Temperature Coefficient | ΔVOUT/(VOUT×ΔT) | 35 | ppm/℃ | VIN = VOUT + 2V or 4V, IOUT = 1mA, Full | 4 | ||
| Input Voltage Range | VIN | 2.7 | 36 | V | VOUT ≥ 3.3V, Full | 4 | |
| EN Input Threshold High | VIH | 1.2 | V | VIN = 2.7V to 36V, Full | 4 | ||
| EN Input Threshold Low | VIL | 0.4 | V | VIN = 2.7V to 36V, Full | 4 | ||
| EN Input Bias Current High | IBH | 0.02 | 1 | μA | VEN = VIN, Full | 4 | |
| EN Input Bias Current Low | IBL | -1 | 1 | μA | VEN = 0V, Full | 4 | |
| Shutdown Supply Current | IQ(SHDN) | 1.5 | 2 | μA | VEN = 0V, +25℃ | 4 | |
| Input Voltage (absolute maximum, VIN, EN to GND) | VIN, EN | -0.3 | 44 | V | to GND | 2 | |
| VOUT to GND (absolute maximum) | VOUT | -0.3 | 15 | V | to GND; printed as Min(VIN + 0.3V, 15V) | 2 | |
| BP, FB to GND (absolute maximum) | BP, FB | -0.3 | 6 | V | to GND; printed as Min(VIN + 0.3V, 6V) | 2 | |
| Junction Temperature | TJ | 150 | ℃ | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | ℃ | 2 | ||
| Lead Temperature (Soldering) | 260 | ℃ | 10s | 2 | |||
| ESD MM | 150 | V | MM | 2 | |||
| Operating Temperature Range | TA | -40 | 85 | ℃ | 2 | ||
| Thermal Resistance Junction-to-Ambient SOT-23-5 | θJA | 164.8 | ℃/W | SOT-23-5 and SOT-23-5 (L-Type) | 2 | ||
| Thermal Resistance Junction-to-Board SOT-23-5 | θJB | 40.6 | ℃/W | SOT-23-5 and SOT-23-5 (L-Type) | 2 | ||
| Thermal Resistance Junction-to-Case SOT-23-5 | θJC | 84.3 | ℃/W | SOT-23-5 and SOT-23-5 (L-Type) | 2 |
CAD (KiCad official)
- Symbol:
SGM2202-3.3YN5G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
sgm2202-3-3yn5g-etched.step/sgm2202-3-3yn5g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm2202-3-3yn5g.step/sgm2202-3-3yn5g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (11 pp, sha256
ffa2256d1fae7345, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).