component
SGM2019-1.2YN5G
Public Made by Adomby adom
SGMICRO Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SGM2019-1.2YN5G
SGMICRO · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SGM2019-1.2YN5G from SGMICRO, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Regulator input; supply voltage can range from 2.5V to 5.5V, and it should be bypassed with a 1μF capacitor to GND. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | EN | input | Shutdown input; a logic low reduces the supply current to 10nA, and it should be connected to IN for normal operation. |
| 4 | BP | passive | Reference-noise bypass for the fixed-voltage version (this MPN, SGM2019-1.2, is fixed-voltage); bypass with a low-leakage 0.01μF ceramic capacitor for reduced output noise. |
| 5 | OUT | power_out | Regulator output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.5 | 5.5 | V | TA = +25℃ | 3 | |
| Output Voltage Accuracy | -2.5 | 2.5 | % | IOUT = 0.1mA, +25℃ | 3 | ||
| Current Limit | ILIM | 310 | 500 | mA | +25℃ | 3 | |
| Ground Pin Current | IQ | 100 | 200 | µA | No load, EN = 2V, +25℃ | 3 | |
| Dropout Voltage | 270 | 400 | mV | IOUT = 300mA, +25℃ | 3 | ||
| Line Regulation | ΔVLNR | 0.02 | 0.05 | %/V | VIN = 2.5V or (VOUT + 0.5V) to 5.5V, IOUT = 1mA, +25℃ | 3 | |
| Load Regulation (VOUT ≤ 2V) | ΔVLDR | 0.004 | 0.008 | %/mA | IOUT = 0.1mA to 300mA, COUT = 1µF, VOUT ≤ 2V, +25℃ | 3 | |
| EN Input Threshold (high) | VIH | 1.5 | V | VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full (-40℃ to +85℃) | 3 | ||
| EN Input Threshold (low) | VIL | 0.3 | V | VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full (-40℃ to +85℃) | 3 | ||
| EN Input Bias Current | IB(SHDN) | 0.01 | 1 | µA | EN = 0V or EN = 5.5V, +25℃ | 3 | |
| IN to GND | -0.3 | 6 | V | 2 | |||
| EN to GND | -0.3 | V | 2 | ||||
| OUT, BP/FB to GND | -0.3 | V | 2 | ||||
| Power Dissipation SOT-23-5 | PD | 0.4 | W | TA = 25℃ | 2 | ||
| Operating Temperature Range | -40 | 85 | ℃ | 2 | |||
| Junction Temperature | 150 | ℃ | 2 | ||||
| Storage Temperature Range | -65 | 150 | ℃ | 2 | |||
| ESD Susceptibility HBM | 4000 | V | HBM | 2 | |||
| ESD Susceptibility MM | 400 | V | MM | 2 |
CAD (KiCad official)
- Symbol:
SGM2019-1.2YN5G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
sgm2019-1-2yn5g-etched.step/sgm2019-1-2yn5g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sgm2019-1-2yn5g.step/sgm2019-1-2yn5g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (16 pp, sha256
76412693dc3f9952, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SGM2019-1.2YN5G
**SGMICRO** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SGM2019-1.2YN5G from SGMICRO, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Regulator input; supply voltage can range from 2.5V to 5.5V, and it should be bypassed with a 1μF capacitor to GND. |
| 2 | GND | power_in | Ground reference pin. |
| 3 | EN | input | Shutdown input; a logic low reduces the supply current to 10nA, and it should be connected to IN for normal operation. |
| 4 | BP | passive | Reference-noise bypass for the fixed-voltage version (this MPN, SGM2019-1.2, is fixed-voltage); bypass with a low-leakage 0.01μF ceramic capacitor for reduced output noise. |
| 5 | OUT | power_out | Regulator output. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN | 2.5 | | 5.5 | V | TA = +25℃ | 3 |
| Output Voltage Accuracy | | -2.5 | | 2.5 | % | IOUT = 0.1mA, +25℃ | 3 |
| Current Limit | ILIM | | 310 | 500 | mA | +25℃ | 3 |
| Ground Pin Current | IQ | | 100 | 200 | µA | No load, EN = 2V, +25℃ | 3 |
| Dropout Voltage | | | 270 | 400 | mV | IOUT = 300mA, +25℃ | 3 |
| Line Regulation | ΔVLNR | | 0.02 | 0.05 | %/V | VIN = 2.5V or (VOUT + 0.5V) to 5.5V, IOUT = 1mA, +25℃ | 3 |
| Load Regulation (VOUT ≤ 2V) | ΔVLDR | | 0.004 | 0.008 | %/mA | IOUT = 0.1mA to 300mA, COUT = 1µF, VOUT ≤ 2V, +25℃ | 3 |
| EN Input Threshold (high) | VIH | 1.5 | | | V | VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full (-40℃ to +85℃) | 3 |
| EN Input Threshold (low) | VIL | | | 0.3 | V | VIN = 2.5V to 5.5V, VEN = -0.3V to VIN, Full (-40℃ to +85℃) | 3 |
| EN Input Bias Current | IB(SHDN) | | 0.01 | 1 | µA | EN = 0V or EN = 5.5V, +25℃ | 3 |
| IN to GND | | -0.3 | | 6 | V | | 2 |
| EN to GND | | -0.3 | | | V | | 2 |
| OUT, BP/FB to GND | | -0.3 | | | V | | 2 |
| Power Dissipation SOT-23-5 | PD | | | 0.4 | W | TA = 25℃ | 2 |
| Operating Temperature Range | | -40 | | 85 | ℃ | | 2 |
| Junction Temperature | | | | 150 | ℃ | | 2 |
| Storage Temperature Range | | -65 | | 150 | ℃ | | 2 |
| ESD Susceptibility HBM | | | | 4000 | V | HBM | 2 |
| ESD Susceptibility MM | | | | 400 | V | MM | 2 |
## CAD (KiCad official)
- Symbol: `SGM2019-1.2YN5G`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `sgm2019-1-2yn5g-etched.step` / `sgm2019-1-2yn5g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sgm2019-1-2yn5g.step` / `sgm2019-1-2yn5g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SGMICRO datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586198923945365504) (16 pp, sha256 `76412693dc3f9952`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sgm2019-1-2yn5g-datasheet.pdf)