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SG3526N

Public Made by Adom

by adom

XBLW AC-DC Controllers And Regulators, DIP-18. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SG3526N

XBLW · AC-DC Controllers And Regulators · DIP-18

SG3526N from XBLW, in a DIP-18. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +Error input Non-inverting input of the error amplifier; analog inputs are limited to -0.3 to +5.5 V.
2 -Error input Inverting input of the error amplifier; analog inputs are limited to -0.3 to +5.5 V.
3 Compensation output Error amplifier output for loop compensation, which feeds the PWM comparator.
4 CSoft-Start passive Soft-start capacitor connection, charged at 100 uA typ (50 to 150 uA) when Reset is high.
5 Reset input Active-low digital reset port for the soft-start section; TTL and B-series CMOS compatible.
6 -CS input Inverting input of the current limit comparator; sense voltage is 100 mV typ (80 to 120 mV).
7 +CS input Non-inverting input of the current limit comparator, used for digital current limiting.
8 Shutdown input Active-low digital shutdown port; TTL and B-series CMOS compatible.
9 RT passive Oscillator timing resistor connection; Rt is 2.0 to 150 kOhm.
10 CT passive Oscillator timing capacitor connection; Ct is 0.001 to 20 uF.
11 RDeadtime passive Dead time adjust resistor connection; available dead time range is 3.0 to 50 % at 40 kHz.
12 Sync bidirectional Oscillator synchronization port, digital TTL and B-series CMOS compatible, for synchronizing up to 6 units.
13 Output A output Totem pole output A, sources or sinks up to ±100 mA recommended (±200 mA max).
14 VC power_in Collector supply for the output drivers, 4.5 to 35 V recommended (40 V max).
15 Ground power_in Ground reference for the device.
16 Output B output Totem pole output B, sources or sinks up to ±100 mA recommended (±200 mA max).
17 VCC power_in Supply voltage input, 8.0 to 35 V recommended (40 V max).
18 Vref power_out 5.0 V ±1% trimmed reference output, load current 0 to 20 mA recommended (50 mA max).

Key specifications

Parameter Value
Manufacturer XBLW
Package DIP-18
Category Power Management (PMIC)
Pins 18

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Vcc 40 Vdc 3
Collector Supply Voltage Vc 40 Vdc 3
Logic Inputs -0.3 5.5 V 3
Analog Inputs -0.3 5.5 V 3
Output Current, Source or Sink Io -200 200 mA 3
Reference Load Current Iref 50 mA Vcc=40V (Note2) 3
Logic Sink Current 15 mA 3
Power Dissipation Pd 1000 mW Ta=+25℃ (note3) 3
Operating Temperature Range Ta 0 70 ℃ 3
Storage Temperature Range Tstg -65 150 ℃ 3
Lead Temperature (Soldering, 10 Seconds) Tsolder -300 300 ℃ Soldering, 10 seconds 3
Supply Voltage Vcc 8 35 Vdc 4
Collector Supply Voltage Vc 4.5 35 Vdc 4
Output Sink/Source Current (Each Output) Io 0 100 mA 4
Reference Load Current Iref 0 20 mA 4
Oscillator Frequency Range Fosc 0.001 400 Khz 4
Oscillator Timing Resistor Rt 2 150 KΩ 4
Oscillator Timing Capacitor Ct 0.001 20 uF 4
Available Deadtime Range 3 50 % fosc=40Khz 4
Operating Junction Temperature Range Tj 0 125 ℃ 4
Minimum Frequency Fmin 0.5 Hz Rt=150Kohm, Ct=20uF 4
Maximum Frequency Fmax 400 KHz Rt=2.0Kohm, Ct=0.001uF 4
Sawtooth Peak Voltage Vosc(p) 3 3.5 V Vcc=35V 4
Sawtooth Valley Voltage Vosc(V) 0.45 0.8 V Vcc=8.0V 4
Input Offset Voltage Vio 2 10 mV Error amplifier (note6) 4
Input Bias Current Iib -350 -2000 nA Error amplifier (note6) 4
Input Offset Current Iio 35 200 nA Error amplifier (note6) 4
DC Open Loop Gain Av 60 72 dB Rl≥10Mohm 4
High Output Voltage Voh 3.6 4.2 V Vpin1-Vpin2≥+150mV, Isource=100uA 4
Low Output Voltage Vol 0.2 0.4 V Vpin2-Vpin1≥+150mV, Isink=100uA 4
Common Mode Rejection Ratio CMRR 70 94 dB Rs≤2.0Kohm 4
Power Supply Rejection Ratio PSRR 66 80 dB +12V≤Vcc≤+18V 4
Minimum Duty Cycle Dcmin 0 % Vcompensation = +0.4V 4
Maximum Duty Cycle Dcmax 45 49 % Vcompensation = +3.6V 4
Output Voltage High Level Voh 2.4 4 V Digital ports (SYNC, SHUTDOWN, RESET), Isource=40uA 5
Output Voltage Low Level Vol 0.2 0.4 V Digital ports (SYNC, SHUTDOWN, RESET), Isink=3.6mA 5
Input Current High Logic Level Iih -125 -225 uA Vih=+2.4V 5
Input Current Low Logic Level Iil -200 -360 uA Vil=+0.4V 5
Sense Voltage Vsense 80 100 120 mA Rs≤50 Ω 5
Input Bias Current (Current Limit Comparator) Iib -3 -10 uA 5
Error Clamp Voltage 0.1 0.4 V Reset=+0.4V 5
Soft-Start Charging Current Ics 50 100 150 uA Reset=+2.4V 5
Output High Level (Output Driver) Voh 12 13 V Vc=+15Vdc, Isource = 100mA 5
Output Low Level (Output Driver) Vol 0.2 0.3 V Vc=+15Vdc, Isink = 20 mA 5
Collector Leakage Ic(Leak) 50 150 uA Vc=+40V 5
Rise Time Tr 0.3 0.6 uS CL=1000pF 5
Fall Time Tf 0.1 0.2 uS CL=1000pF 5
Supply Current Icc 18 30 mA Shutdown = +0.4V, Vcc=+35V, Rt=4.12KΩ 5

CAD (KiCad official)

  • Symbol: SG3526N
  • Footprint: Package_DIP:DIP-18_W7.62mm
  • 3D model: DIP-18 (KiCad packages3D, STEP)
  • 3D model files: sg3526n-etched.step / sg3526n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sg3526n.step / sg3526n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (12 pp, sha256 a0d2ba46880f6ee2, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF