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SG3525S
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IDCHIP DC-DC Converters, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SG3525S
IDCHIP · DC-DC Converters · DIP-16
SG3525S from IDCHIP, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Inv. Input | input | Inverting input of the error amplifier, with a common-mode range of +1.5 V to +5.2 V that includes the 5.1 V reference. |
| 2 | Noninv. Input | input | Noninverting input of the error amplifier, with a common-mode range of +1.5 V to +5.2 V that includes the 5.1 V reference. |
| 3 | Sync | bidirectional | Oscillator synchronization pin that allows master-slave operation or synchronization to an external clock, with a sync threshold of 1.2 to 2.8 V. |
| 4 | OSC. Output | output | Oscillator clock output, typically 3.5 V high with a 0.5 µs pulse width. |
| 5 | CT | passive | Oscillator timing capacitor connection, recommended range 0.001 to 0.2 µF. |
| 6 | RT | passive | Oscillator timing resistor connection to ground, recommended range 2.0 to 150 kΩ. |
| 7 | Discharge | passive | Oscillator discharge pin where a resistor RD (0 to 500 Ω) to CT sets the dead time. |
| 8 | Soft-Start | passive | Soft-start capacitor pin with a 50 µA (25 to 80 µA) pull-up current source, which is discharged when shutdown is asserted or Vcc is under-voltage. |
| 9 | Compensation | bidirectional | Error amplifier output for loop compensation, which has a pull-up current source so a pull-down of 100 µA can shut off the outputs. |
| 10 | Shutdown | input | Shutdown input that, when high, immediately acts on the PWM latch and discharges the soft-start capacitor at 100 µA; it must not be left floating. |
| 11 | Output A | output | Totem-pole output A that sinks and sources up to ±100 mA continuous (±400 mA peak). |
| 12 | Ground | power_in | Ground reference for the device. |
| 13 | VC | power_in | Collector supply for the output stage, recommended 4.5 to 35 V (absolute maximum +40 V). |
| 14 | Output B | output | Totem-pole output B that sinks and sources up to ±100 mA continuous (±400 mA peak). |
| 15 | VCC | power_in | Supply voltage input, recommended 8.0 to 35 V (absolute maximum +40 V). |
| 16 | Vref | power_out | Reference output of 5.1 V ±1.0% (5.00 to 5.20 V), with load current of 0 to 20 mA and short-circuit current typically 80 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | IDCHIP |
| Package | DIP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SG3525S - Footprint:
Package_DIP:DIP-16_W7.62mm - 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files:
sg3525s-etched.step/sg3525s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sg3525s.step/sg3525s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: IDCHIP datasheet (7 pp, sha256
05503e475673435d, retrieved 2026-10-13, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SG3525S
**IDCHIP** · DC-DC Converters · DIP-16
SG3525S from IDCHIP, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Inv. Input | input | Inverting input of the error amplifier, with a common-mode range of +1.5 V to +5.2 V that includes the 5.1 V reference. |
| 2 | Noninv. Input | input | Noninverting input of the error amplifier, with a common-mode range of +1.5 V to +5.2 V that includes the 5.1 V reference. |
| 3 | Sync | bidirectional | Oscillator synchronization pin that allows master-slave operation or synchronization to an external clock, with a sync threshold of 1.2 to 2.8 V. |
| 4 | OSC. Output | output | Oscillator clock output, typically 3.5 V high with a 0.5 µs pulse width. |
| 5 | CT | passive | Oscillator timing capacitor connection, recommended range 0.001 to 0.2 µF. |
| 6 | RT | passive | Oscillator timing resistor connection to ground, recommended range 2.0 to 150 kΩ. |
| 7 | Discharge | passive | Oscillator discharge pin where a resistor RD (0 to 500 Ω) to CT sets the dead time. |
| 8 | Soft-Start | passive | Soft-start capacitor pin with a 50 µA (25 to 80 µA) pull-up current source, which is discharged when shutdown is asserted or Vcc is under-voltage. |
| 9 | Compensation | bidirectional | Error amplifier output for loop compensation, which has a pull-up current source so a pull-down of 100 µA can shut off the outputs. |
| 10 | Shutdown | input | Shutdown input that, when high, immediately acts on the PWM latch and discharges the soft-start capacitor at 100 µA; it must not be left floating. |
| 11 | Output A | output | Totem-pole output A that sinks and sources up to ±100 mA continuous (±400 mA peak). |
| 12 | Ground | power_in | Ground reference for the device. |
| 13 | VC | power_in | Collector supply for the output stage, recommended 4.5 to 35 V (absolute maximum +40 V). |
| 14 | Output B | output | Totem-pole output B that sinks and sources up to ±100 mA continuous (±400 mA peak). |
| 15 | VCC | power_in | Supply voltage input, recommended 8.0 to 35 V (absolute maximum +40 V). |
| 16 | Vref | power_out | Reference output of 5.1 V ±1.0% (5.00 to 5.20 V), with load current of 0 to 20 mA and short-circuit current typically 80 mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | IDCHIP |
| Package | DIP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `SG3525S`
- Footprint: `Package_DIP:DIP-16_W7.62mm`
- 3D model: DIP-16 (KiCad packages3D, STEP)
- 3D model files: `sg3525s-etched.step` / `sg3525s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sg3525s.step` / `sg3525s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [IDCHIP datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602912819532603392) (7 pp, sha256 `05503e475673435d`, retrieved 2026-10-13, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sg3525s-datasheet.pdf)