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SG3525MT
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HGSEMI AC-DC Controllers And Regulators, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SG3525MT
HGSEMI · AC-DC Controllers And Regulators · TSSOP-16
SG3525MT from HGSEMI, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Inv. Input | input | Error amplifier inverting input, with the amplifier's common-mode range including the 5.1V reference and a common-mode input range of 1.5 to 5.2V specified for CMRR. |
| 2 | Noninv. Input | input | Error amplifier non-inverting input, with the amplifier's common-mode range including the 5.1V reference so no external resistor is needed. |
| 3 | Sync | bidirectional | Oscillator synchronization signal pin for master-slave operation or external clock sync, with a typical sync threshold of 2V (1.2 to 2.8V). |
| 4 | OSC. Output | output | Oscillator clock output with a clock amplitude of 3V minimum (4V as printed in the table) and a typical clock width of 0.6us. |
| 5 | CT | passive | Oscillator timing capacitor pin; the resistor between CT and Discharge sets the dead time, with oscillator frequency range 100Hz to 500kHz. |
| 6 | RT | passive | Oscillator timing resistor pin, with oscillator frequency range 100Hz to 500kHz. |
| 7 | Discharge | passive | Oscillator discharge pin; the resistor between CT and this pin adjusts the dead time. |
| 8 | Soft-Start | passive | Soft-start circuit pin with a typical soft-start current of 51uA (25 to 80uA). |
| 9 | Compensation | output | Error amplifier compensation pin, with undervoltage lockout acting when V8 and V9 are high, typically at 7V (6 to 8V). |
| 10 | Shutdown | input | Shutdown input with a typical threshold voltage of 0.8V (0.6 to 1V) and a typical input current of 0.3mA at 2.5V. |
| 11 | Output A | output | Totem-pole output stage with source and sink current exceeding 150mA, NOR logic, low in the off state. |
| 12 | Ground | power_in | Ground reference pin. |
| 13 | VC | power_in | Collector supply voltage for the output stage, with an absolute maximum of 40V. |
| 14 | Output B | output | Totem-pole output stage with source and sink current exceeding 150mA, NOR logic, low in the off state. |
| 15 | VCC | power_in | Supply voltage pin with an operating range of 8 to 35V and an absolute maximum of 40V. |
| 16 | Vref | power_out | 5.1V reference output with 1% accuracy (5.0 to 5.2V at TJ=25C), absolute maximum reference output current 50mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SG3525MT - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sg3525mt-etched.step/sg3525mt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sg3525mt.step/sg3525mt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
5277772c8ab62d7b, retrieved 2026-10-28, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SG3525MT
**HGSEMI** · AC-DC Controllers And Regulators · TSSOP-16
SG3525MT from HGSEMI, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Inv. Input | input | Error amplifier inverting input, with the amplifier's common-mode range including the 5.1V reference and a common-mode input range of 1.5 to 5.2V specified for CMRR. |
| 2 | Noninv. Input | input | Error amplifier non-inverting input, with the amplifier's common-mode range including the 5.1V reference so no external resistor is needed. |
| 3 | Sync | bidirectional | Oscillator synchronization signal pin for master-slave operation or external clock sync, with a typical sync threshold of 2V (1.2 to 2.8V). |
| 4 | OSC. Output | output | Oscillator clock output with a clock amplitude of 3V minimum (4V as printed in the table) and a typical clock width of 0.6us. |
| 5 | CT | passive | Oscillator timing capacitor pin; the resistor between CT and Discharge sets the dead time, with oscillator frequency range 100Hz to 500kHz. |
| 6 | RT | passive | Oscillator timing resistor pin, with oscillator frequency range 100Hz to 500kHz. |
| 7 | Discharge | passive | Oscillator discharge pin; the resistor between CT and this pin adjusts the dead time. |
| 8 | Soft-Start | passive | Soft-start circuit pin with a typical soft-start current of 51uA (25 to 80uA). |
| 9 | Compensation | output | Error amplifier compensation pin, with undervoltage lockout acting when V8 and V9 are high, typically at 7V (6 to 8V). |
| 10 | Shutdown | input | Shutdown input with a typical threshold voltage of 0.8V (0.6 to 1V) and a typical input current of 0.3mA at 2.5V. |
| 11 | Output A | output | Totem-pole output stage with source and sink current exceeding 150mA, NOR logic, low in the off state. |
| 12 | Ground | power_in | Ground reference pin. |
| 13 | VC | power_in | Collector supply voltage for the output stage, with an absolute maximum of 40V. |
| 14 | Output B | output | Totem-pole output stage with source and sink current exceeding 150mA, NOR logic, low in the off state. |
| 15 | VCC | power_in | Supply voltage pin with an operating range of 8 to 35V and an absolute maximum of 40V. |
| 16 | Vref | power_out | 5.1V reference output with 1% accuracy (5.0 to 5.2V at TJ=25C), absolute maximum reference output current 50mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
## CAD (KiCad official)
- Symbol: `SG3525MT`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `sg3525mt-etched.step` / `sg3525mt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sg3525mt.step` / `sg3525mt.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](docs/sg3525mt-datasheet.pdf) (9 pp, sha256 `5277772c8ab62d7b`, retrieved 2026-10-28, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sg3525mt-datasheet.pdf)