component
SG3525ADWR2G
Public Made by Adomby adom
onsemi AC-DC Controllers And Regulators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# SG3525ADWR2G++**onsemi** · AC-DC Controllers And Regulators · SOIC-16-300mil++SG3525ADWR2G from onsemi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | INV_INPUT | input | Error amplifier inverting (−) input; common-mode range +1.5 V to +5.2 V, input bias current 1.0 µA typ, input offset voltage 2.0 mV typ. |+| 2 | NONINV_INPUT | input | Error amplifier non-inverting (+) input; common-mode range includes the +5.1 V reference, CMRR 60 dB min, input offset current ≤ 1.0 µA. |+| 3 | SYNC | input | Oscillator synchronization input; enables slaving multiple units to an external clock; sync threshold 1.2 V min / 2.8 V max, input current 1.0 mA typ at 3.5 V. |+| 4 | OSC_OUTPUT | output | Oscillator clock output; clock amplitude 3.0 V min / 3.5 V typ, clock pulse width 0.3 µs min / 1.0 µs max. |+| 5 | CT | passive | Oscillator timing capacitor terminal; CT = 0.001 µF to 0.2 µF sets charge time with RT; Discharge pin (7) pulls this node low to set deadtime. |+| 6 | RT | passive | Oscillator timing resistor terminal; RT = 2.0 kΩ to 150 kΩ; sets oscillator frequency 100 Hz to 400 kHz in conjunction with CT. |+| 7 | DISCHARGE | passive | Oscillator discharge / deadtime control terminal; a single resistor RD = 0 Ω to 500 Ω connected between this pin and CT programs the deadtime. |+| 8 | SOFT_START | passive | Soft-start timing capacitor terminal; internal 50 µA typ charge current (25-80 µA range); Shutdown assertion discharges capacitor at 150 µA; outputs inhibited during UVLO charging. |+| 9 | COMPENSATION | output | Error amplifier output node for external frequency-compensation network; high-level output 3.8 V min / 5.6 V typ, low-level output 0.2 V typ / 0.5 V max, DC open-loop gain 60 dB min. |+| 10 | SHUTDOWN | input | Active-high shutdown input; immediately sets PWM latch for fastest output turn-off and sinks 150 µA to discharge soft-start capacitor; must not be left floating; input current 0.4 mA typ at 2.5 V. |+| 11 | OUTPUT_A | output | PWM output A, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; rise time 100 ns typ / 600 ns max into 1.0 nF. |+| 12 | GND | power_in | Device ground reference for all internal circuitry and output stage return. |+| 13 | VC | power_in | Output stage collector supply; 4.5 V to 35 V operating, 40 V absolute maximum; collector leakage ≤ 200 µA at VC = 35 V. |+| 14 | OUTPUT_B | output | PWM output B, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; fall time 50 ns typ / 300 ns max into 1.0 nF. |+| 15 | VCC | power_in | Supply voltage input; 8.0 V to 35 V operating, 40 V absolute maximum; under-voltage lockout threshold 7.0 V typ (6.0 V min / 8.0 V max); supply current 14 mA typ / 20 mA max at 35 V. |+| 16 | VREF | power_out | +5.1 V trimmed reference output, ±1.0% at TJ = +25 °C; total variation 4.95-5.25 V over line, load, and temperature; load current 0-20 mA, short-circuit current 80 mA typ. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-16-300mil |+| Category | Power Management (PMIC) |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `SG3525ADWR2G`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)+- 3D model files: `sg3525adwr2g-etched.step` / `sg3525adwr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sg3525adwr2g.step` / `sg3525adwr2g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586177500296171520) (10 pp, sha256 `2c62cf949fb3216e`, retrieved 2026-09-21, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sg3525adwr2g-datasheet.pdf)
page.jsonadded+191@@ -0,0 +1,191 @@+{+ "slug": "sg3525adwr2g",+ "version": "0.1.0",+ "type": "component",+ "description": "onsemi AC-DC Controllers And Regulators, SOIC-16-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "sg3525adwr2g",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sg3525adwr2g.kicad_sym",+ "sg3525adwr2g.kicad_mod",+ "sg3525adwr2g.glb",+ "sg3525adwr2g.step",+ "sg3525adwr2g.lbr",+ "docs/hero.png",+ "docs/sg3525adwr2g-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "SG3525ADWR2G",+ "manufacturer": "onsemi",+ "package": "SOIC-16-300mil",+ "pin_count": 16,+ "category": "Power Management (PMIC)",+ "subcategory": "AC-DC Controllers And Regulators",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586177500296171520",+ "parts": {+ "symbol": "sg3525adwr2g.kicad_sym",+ "footprint": "sg3525adwr2g.kicad_mod",+ "model_3d": "sg3525adwr2g-etched.glb",+ "model_3d_plain": "sg3525adwr2g.glb",+ "model_3d_step": "sg3525adwr2g-etched.step",+ "model_3d_step_plain": "sg3525adwr2g.step",+ "lbr": "sg3525adwr2g.lbr"+ },+ "distributor_links": {+ "lcsc": "C30293"+ },+ "pins": [+ {+ "number": "1",+ "name": "INV_INPUT",+ "type": "input",+ "description": "Error amplifier inverting (−) input; common-mode range +1.5 V to +5.2 V, input bias current 1.0 µA typ, input offset voltage 2.0 mV typ."+ },+ {+ "number": "2",+ "name": "NONINV_INPUT",+ "type": "input",+ "description": "Error amplifier non-inverting (+) input; common-mode range includes the +5.1 V reference, CMRR 60 dB min, input offset current ≤ 1.0 µA."+ },+ {+ "number": "3",+ "name": "SYNC",+ "type": "input",+ "description": "Oscillator synchronization input; enables slaving multiple units to an external clock; sync threshold 1.2 V min / 2.8 V max, input current 1.0 mA typ at 3.5 V."+ },+ {+ "number": "4",+ "name": "OSC_OUTPUT",+ "type": "output",+ "description": "Oscillator clock output; clock amplitude 3.0 V min / 3.5 V typ, clock pulse width 0.3 µs min / 1.0 µs max."+ },+ {+ "number": "5",+ "name": "CT",+ "type": "passive",+ "description": "Oscillator timing capacitor terminal; CT = 0.001 µF to 0.2 µF sets charge time with RT; Discharge pin (7) pulls this node low to set deadtime."+ },+ {+ "number": "6",+ "name": "RT",+ "type": "passive",+ "description": "Oscillator timing resistor terminal; RT = 2.0 kΩ to 150 kΩ; sets oscillator frequency 100 Hz to 400 kHz in conjunction with CT."+ },+ {+ "number": "7",+ "name": "DISCHARGE",+ "type": "passive",+ "description": "Oscillator discharge / deadtime control terminal; a single resistor RD = 0 Ω to 500 Ω connected between this pin and CT programs the deadtime."+ },+ {+ "number": "8",+ "name": "SOFT_START",+ "type": "passive",+ "description": "Soft-start timing capacitor terminal; internal 50 µA typ charge current (25-80 µA range); Shutdown assertion discharges capacitor at 150 µA; outputs inhibited during UVLO charging."+ },+ {+ "number": "9",+ "name": "COMPENSATION",+ "type": "output",+ "description": "Error amplifier output node for external frequency-compensation network; high-level output 3.8 V min / 5.6 V typ, low-level output 0.2 V typ / 0.5 V max, DC open-loop gain 60 dB min."+ },+ {+ "number": "10",+ "name": "SHUTDOWN",+ "type": "input",+ "description": "Active-high shutdown input; immediately sets PWM latch for fastest output turn-off and sinks 150 µA to discharge soft-start capacitor; must not be left floating; input current 0.4 mA typ at 2.5 V."+ },+ {+ "number": "11",+ "name": "OUTPUT_A",+ "type": "output",+ "description": "PWM output A, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; rise time 100 ns typ / 600 ns max into 1.0 nF."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground reference for all internal circuitry and output stage return."+ },+ {+ "number": "13",+ "name": "VC",+ "type": "power_in",+ "description": "Output stage collector supply; 4.5 V to 35 V operating, 40 V absolute maximum; collector leakage ≤ 200 µA at VC = 35 V."+ },+ {+ "number": "14",+ "name": "OUTPUT_B",+ "type": "output",+ "description": "PWM output B, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; fall time 50 ns typ / 300 ns max into 1.0 nF."+ },+ {+ "number": "15",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage input; 8.0 V to 35 V operating, 40 V absolute maximum; under-voltage lockout threshold 7.0 V typ (6.0 V min / 8.0 V max); supply current 14 mA typ / 20 mA max at 35 V."+ },+ {+ "number": "16",+ "name": "VREF",+ "type": "power_out",+ "description": "+5.1 V trimmed reference output, ±1.0% at TJ = +25 °C; total variation 4.95-5.25 V over line, load, and temperature; load current 0-20 mA, short-circuit current 80 mA typ."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "1/16 pins cited to the wrong page (name found elsewhere): ['16:Ground@p1']"+ ],+ "pages_sent": 10,+ "cost_usd": 0.6584,+ "at": "2026-09-21T21:29:15"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586177500296171520",+ "pages": 10,+ "sha256": "2c62cf949fb3216e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}