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Contents

README

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SG3525ADWR2G

onsemi · AC-DC Controllers And Regulators · SOIC-16-300mil

SG3525ADWR2G from onsemi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 INV_INPUT input Error amplifier inverting (−) input; common-mode range +1.5 V to +5.2 V, input bias current 1.0 µA typ, input offset voltage 2.0 mV typ.
2 NONINV_INPUT input Error amplifier non-inverting (+) input; common-mode range includes the +5.1 V reference, CMRR 60 dB min, input offset current ≤ 1.0 µA.
3 SYNC input Oscillator synchronization input; enables slaving multiple units to an external clock; sync threshold 1.2 V min / 2.8 V max, input current 1.0 mA typ at 3.5 V.
4 OSC_OUTPUT output Oscillator clock output; clock amplitude 3.0 V min / 3.5 V typ, clock pulse width 0.3 µs min / 1.0 µs max.
5 CT passive Oscillator timing capacitor terminal; CT = 0.001 µF to 0.2 µF sets charge time with RT; Discharge pin (7) pulls this node low to set deadtime.
6 RT passive Oscillator timing resistor terminal; RT = 2.0 kΩ to 150 kΩ; sets oscillator frequency 100 Hz to 400 kHz in conjunction with CT.
7 DISCHARGE passive Oscillator discharge / deadtime control terminal; a single resistor RD = 0 Ω to 500 Ω connected between this pin and CT programs the deadtime.
8 SOFT_START passive Soft-start timing capacitor terminal; internal 50 µA typ charge current (25-80 µA range); Shutdown assertion discharges capacitor at 150 µA; outputs inhibited during UVLO charging.
9 COMPENSATION output Error amplifier output node for external frequency-compensation network; high-level output 3.8 V min / 5.6 V typ, low-level output 0.2 V typ / 0.5 V max, DC open-loop gain 60 dB min.
10 SHUTDOWN input Active-high shutdown input; immediately sets PWM latch for fastest output turn-off and sinks 150 µA to discharge soft-start capacitor; must not be left floating; input current 0.4 mA typ at 2.5 V.
11 OUTPUT_A output PWM output A, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; rise time 100 ns typ / 600 ns max into 1.0 nF.
12 GND power_in Device ground reference for all internal circuitry and output stage return.
13 VC power_in Output stage collector supply; 4.5 V to 35 V operating, 40 V absolute maximum; collector leakage ≤ 200 µA at VC = 35 V.
14 OUTPUT_B output PWM output B, totem-pole NOR-logic (low = off-state); VOL ≤ 2.0 V at 100 mA sink, VOH ≥ 17 V at 100 mA source, 400 mA peak; fall time 50 ns typ / 300 ns max into 1.0 nF.
15 VCC power_in Supply voltage input; 8.0 V to 35 V operating, 40 V absolute maximum; under-voltage lockout threshold 7.0 V typ (6.0 V min / 8.0 V max); supply current 14 mA typ / 20 mA max at 35 V.
16 VREF power_out +5.1 V trimmed reference output, ±1.0% at TJ = +25 °C; total variation 4.95-5.25 V over line, load, and temperature; load current 0-20 mA, short-circuit current 80 mA typ.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16-300mil
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: SG3525ADWR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: sg3525adwr2g-etched.step / sg3525adwr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sg3525adwr2g.step / sg3525adwr2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 2c62cf949fb3216e, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF