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SFS08R08DF

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ORIENTAL SEMI MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SFS08R08DF

ORIENTAL SEMI · MOSFETs · TO-252

SFS08R08DF from ORIENTAL SEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; drive with VGS up to ±20 V absolute maximum, with VGS(th) of 1.0 to 2.5 V at ID=250 μA.
2 D passive Drain (also the exposed tab); VDS is rated 80 V and continuous drain current is 64 A at TC=25 °C.
3 S passive Source; connects to the body diode anode, with continuous diode forward current of 64 A at TC=25 °C.

Key specifications

Parameter Value
Manufacturer ORIENTAL SEMI
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain source voltage VDS 80 V 2
Gate source voltage VGS -20 20 V 2
Continuous drain current ID 64 A TC=25 °C 2
Pulsed drain current ID, pulse 192 A TC=25 °C 2
Continuous diode forward current IS 64 A TC=25 °C 2
Diode pulsed current IS, Pulse 192 A TC=25 °C 2
Power dissipation PD 87 W TC=25 °C 2
Single pulsed avalanche energy EAS 25 mJ VDD=50 V, VGS=10 V, L=0.3 mH, starting Tj=25 °C 2
Operation and storage temperature Tstg，Tj -55 175 °C 2
Thermal resistance, junction-case RθJC 1.72 °C/W 2
Thermal resistance, junction-ambient RθJA 62 °C/W 1 in² FR-4 board, 2oz Cu, still air, Ta=25 °C 2
Gate threshold voltage VGS(th) 1 2.5 V VDS=VGS, ID=250 μA 2
Drain-source on-state resistance RDS(ON) 6.2 8 mΩ VGS=10 V, ID=12 A 2
Drain-source on-state resistance RDS(ON) 7.8 10 mΩ VGS=4.5 V, ID=9 A 2
Gate-source leakage current (positive) IGSS 100 nA VGS=20 V 2
Gate-source leakage current (negative) IGSS -100 nA VGS=-20 V 2
Drain-source breakdown voltage BVDSS 80 V VGS=0 V, ID=250 μA 2
Drain-source leakage current IDSS 1 μA VDS=80 V, VGS=0 V 2
Gate resistance RG 3.3 Ω ƒ=1 MHz, Open drain 2
Input capacitance Ciss 2028 pF VGS=0 V, VDS=25 V, ƒ=100 kHz 3
Output capacitance Coss 717 pF VGS=0 V, VDS=25 V, ƒ=100 kHz 3
Reverse transfer capacitance Crss 53.9 pF VGS=0 V, VDS=25 V, ƒ=100 kHz 3
Turn-on delay time td(on) 22.2 ns VGS=10 V, VDS=50 V, RG=2.5 Ω, ID=25 A 3
Rise time tr 6.3 ns VGS=10 V, VDS=50 V, RG=2.5 Ω, ID=25 A 3
Turn-off delay time td(off) 47.5 ns VGS=10 V, VDS=50 V, RG=2.5 Ω, ID=25 A 3
Fall time tf 8.8 ns VGS=10 V, VDS=50 V, RG=2.5 Ω, ID=25 A 3
Total gate charge Qg 28.9 nC VGS=10 V, VDS=50 V, ID=25 A 3
Gate-source charge Qgs 5.4 nC 3
Gate-drain charge Qgd 4.9 nC 3
Gate plateau voltage Vplateau 3.5 V 3
Diode forward voltage VSD 1.3 V IS=12 A, VGS=0 V 3
Reverse recovery time trr 51.3 ns VR=50 V, IS=25 A, di/dt=100 A/μs 3
Reverse recovery charge Qrr 60.6 nC 3
Peak reverse recovery current Irrm 2 A 3

CAD (KiCad official)

  • Symbol: SFS08R08DF
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: sfs08r08df-etched.step / sfs08r08df-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sfs08r08df.step / sfs08r08df.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ORIENTAL SEMI datasheet (8 pp, sha256 52eb9bf419b45db7, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF