# SFH6343T

**Vishay Intertech** · Transistor, Photovoltaic Output Optoisolators · SOIC-8

SFH6343T from Vishay Intertech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not connected in the pin diagram; the datasheet states no function for this pin, so leave it unconnected. |
| 2 | A | passive | LED anode of the GaAlAs infrared emitting diode; the datasheet limits DC forward current to 25 mA and reverse voltage to 3 V. |
| 3 | C | passive | LED cathode of the GaAlAs infrared emitting diode; the datasheet limits DC forward current to 25 mA and reverse voltage to 3 V. |
| 4 | NC | unconnected | Not connected in the pin diagram; the datasheet states no function for this pin, so leave it unconnected. |
| 5 | E | passive | Emitter of the integrated output transistor; the datasheet recommends a 0.1 µF bypass capacitor between pins 5 and 8. |
| 6 | C | output | Open-collector output; the datasheet limits output voltage to 25 V and output current to 8 mA. |
| 7 | NC | unconnected | No base connection on the SFH6343T (ordering table: NO BASE CONNECTION); the datasheet states no function for this pin, so leave it unconnected. |
| 8 | VCC | power_in | Supply voltage pin with a limit of -0.5 to 30 V; a 0.1 µF bypass capacitor between pins 5 and 8 is recommended. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | SOIC-8 |
| Category | Optoisolators |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse voltage | VR |  |  | 3 | V |  | 1 |
| DC forward current | IF |  |  | 25 | mA |  | 1 |
| Surge forward current | IFSM |  |  | 1 | A | tp ≤ 1 μs, 300 pulses/s | 1 |
| Power dissipation (input) | Pdiss |  |  | 45 | mW | Tamb ≤ 70 °C | 1 |
| Supply voltage | VS | -0.5 |  | 30 | V |  | 2 |
| Output voltage | VO | -0.5 |  | 25 | V |  | 2 |
| Output current | IO |  |  | 8 | mA |  | 2 |
| Power dissipation (output) | Pdiss |  |  | 100 | mW | Tamb ≤ 70 °C | 2 |
| Isolation test voltage | VISO |  |  | 4000 | VRMS | between emitter and detector | 2 |
| Storage temperature range | Tstg | -55 |  | 150 | °C |  | 2 |
| Ambient temperature range | Tamb | -55 |  | 100 | °C |  | 2 |
| Junction temperature | Tj |  |  | 100 | °C |  | 2 |
| Soldering temperature |  |  |  | 260 | °C | max. 10 s, dip soldering distance to seating plane ≥ 1.5 mm | 2 |
| Creepage distance |  | 4 |  |  | mm |  | 2 |
| Clearance distance |  | 4 |  |  | mm |  | 2 |
| Forward voltage | VF |  | 1.6 | 1.8 | V | IF = 16 mA, 25 °C | 2 |
| Forward voltage | VF |  | 1.6 | 1.9 | V | IF = 16 mA | 2 |
| Reverse current | IR |  | 0.5 | 10 | μA | VR = 3 V | 2 |
| Logic high supply current | ICCH |  | 0.001 | 1 | μA | IF = 0 mA, VO = open, VCC = 15 V, 25 °C | 2 |
| Logic high supply current | ICCH |  | 0.001 | 2 | μA | IF = 0 mA, VO = open, VCC = 15 V | 2 |
| Logic low output voltage | VOL |  | 0.15 | 0.5 | V | IF = 16 mA, VCC = 4.5 V, IO = 2.4 mA | 2 |
| Logic high output current | IOH |  | 0.003 | 0.5 | μA | IF = 0 mA, VO = VCC = 5.5 V, 25 °C | 2 |
| Logic high output current | IOH |  | 0.01 | 1 | μA | IF = 0 mA, VO = VCC = 15 V, 25 °C | 2 |
| Current transfer ratio | CTR | 19 | 35 | 50 | % | VO = 0.4 V, IF = 16 mA, VCC = 4.5 V, 25 °C | 3 |
| Current transfer ratio | CTR | 15 | 36 |  | % | VO = 0.5 V, IF = 16 mA, VCC = 4.5 V | 3 |
| Propagation delay time to logic low at output | tPHL |  | 0.25 | 1 | μs | RL = 1.9 KΩ | 3 |
| Propagation delay time to logic high at output | tPLH |  | 0.5 | 1 | μs | RL = 1.9 KΩ | 3 |
| Common mode transient immunity at logic high level output | /CMH/ | 15 | 30 |  | kV/μs | RL = 1.9 kΩ, IF = 0 mA, VCM = 1500 VP-P | 4 |
| Common mode transient immunity at logic low level output | /CML/ | 15 | 30 |  | kV/μs | RL = 1.9 kΩ, IF = 16 mA, VCM = 1500 VP-P | 4 |
| Temperature coefficient of forward voltage | ΔVF/ΔT |  | -1.7 |  | mW/°C | IF = 16 mA | 2 |
| Logic low supply current | ICCL |  | 200 |  | μA | IF = 16 mA, VO = open, VCC = 15 V | 2 |
| Logic high output current | IOH |  | 50 |  | μA | IF = 0 mA, VO = VCC = 15 V | 2 |
| Input capacitance | CIN |  | 75 |  | pF | f = 1 MHz, VF = 0 V | 2 |
| Capacitance (input to output) | CIO |  | 0.4 |  | pF | f = 1 MHz | 3 |

## CAD (KiCad official)

- Symbol: `SFH6343T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `sfh6343t-etched.step` / `sfh6343t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sfh6343t.step` / `sfh6343t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010173057314816) (7 pp, sha256 `6517034e5be32edd`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sfh6343t-datasheet.pdf)