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README

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SED4060G

SINO IC · MOSFETs · DFN-8(5x6)

SED4060G from SINO IC, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET, the reference for VGS and the body diode (VSD 1.2 V at IS = 20 A).
2 S passive Source terminal of the N-channel MOSFET, the reference for VGS and the body diode (VSD 1.2 V at IS = 20 A).
3 S passive Source terminal of the N-channel MOSFET, the reference for VGS and the body diode (VSD 1.2 V at IS = 20 A).
4 G input Gate of the N-channel MOSFET; gate-source voltage is rated VGS = ±20 V.
5 D passive Drain terminal of the MOSFET; drain-source voltage is rated 40 V and continuous drain current 60 A.
6 D passive Drain terminal of the MOSFET; drain-source voltage is rated 40 V and continuous drain current 60 A.
7 D passive Drain terminal of the MOSFET; drain-source voltage is rated 40 V and continuous drain current 60 A.
8 D passive Drain terminal of the MOSFET; drain-source voltage is rated 40 V and continuous drain current 60 A.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer SINO IC
Package DFN-8(5x6)
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V 1
Gate-Source Voltage VGS -20 20 V 1
Drain Current, Continuous ID 60 A Continuous 1
Drain Current, Pulsed 200 A Pulsed 1
Total Power Dissipation PD 65 W @TA=25℃ 1
Operating Junction Temperature Range TJ -55 175 ℃ 1
Thermal Resistance Junction to Case RθJC 5 ℃/W 1
Drain-Source Breakdown Voltage BVDSS 40 V ID=250μA, VGS=0 2
Drain to Source Leakage Current IDSS 1 μA VDS=40V, VGS=0V 2
Gate-Body Leakage Current IGSS 300 nA VGS=20V 2
Gate Threshold Voltage VGS(th) 1 1.6 2.2 V VDS= VGS, ID=250μA 2
Static Drain-Source On-Resistance RDS(ON) 7.5 9.5 mΩ VGS=10V, ID=20A 2
Forward Transconductance gFS 25 S VDS=5V, ID=20A 2
Input Capacitance Ciss 942 pF VGS=0V, VDS=20V, f=1MHz 2
Output Capacitance Coss 309 pF 2
Reverse Transfer Capacitance Crss 29 pF 2
Total Gate Charge Qg 14.5 nC VGS=10V, VDS=20V, ID=10A 2
Gate Source Charge Qgs 2 nC 2
Gate Drain Charge Qgd 2.5 nC 2
Turn-On Delay Time td(on) 6 ns VGS=10V, VDS=20V, RGEN=10Ω, ID=10A 2
Turn-Off Delay Time td(off) 21 ns 2
Turn-On Rise Time td(r) 5 ns 2
Turn-Off Fall Time td(f) 5 ns 2
Diode Forward Voltage VSD 1.2 V VGS=0V, IS=20A 2
Reverse Recovery Time trr 24 ns TJ=25℃, IF=10A, Di/dt=100A/μs 2
Reverse Recovery Charge Qrr 19 nC 2

CAD (KiCad official)

  • Symbol: SED4060G
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: sed4060g-etched.step / sed4060g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sed4060g.step / sed4060g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SINO IC datasheet (6 pp, sha256 d399223609a20c19, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF