component
SE9175-HF
Public Made by Adomby adom
Seaward Elec Battery Management ICs, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SE9175-HF
Seaward Elec · Battery Management ICs · SOP-8-EP
SE9175-HF from Seaward Elec, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage pin; recommended range 1.3 V to VCNTL, absolute maximum 6 V. |
| 2 | GND | power_in | Ground pin. |
| 3 | REFEN | input | Reference voltage input and chip enable pin; rising above 0.65 V enables, falling below 0.2 V shuts down the output to high impedance. |
| 4 | VOUT | output | Output voltage pin that sinks or sources up to 2A (current limit min 2.1 A) while tracking the REFEN voltage. |
| 5 | NC | unconnected | No connect pin. |
| 6 | VCNTL | power_in | Supply input and gate drive voltage pin; recommended 5 V or 3.3 V, absolute maximum 6 V. |
| 7 | NC | unconnected | No connect pin. |
| 8 | NC | unconnected | No connect pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Seaward Elec |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Drive Voltage Range | VCNTL | 3.3 | 5.5 | V | 4 | ||
| POR Threshold | VCNTLRTH | 2.55 | V | 4 | |||
| POR Hysteresis | VCNTL | 0.1 | V | 4 | |||
| Input Voltage | VIN | 1.3 | V | max is VCNTL | 4 | ||
| Quiescent Current | ICNTL | 1 | 3 | mA | IOUT=0A | 4 | |
| Standby Current | ISTBY | 1 | 10 | uA | IOUT=0A, VREFEN=0V | 4 | |
| Output Offset Voltage | VOS | -20 | 20 | mV | IOUT=0A | 4 | |
| Load Regulation | ΔVLOAD | -20 | 0.5 | 20 | % | IOUT=±2.0A | 4 |
| Shutdown Threshold Enable | VIH | 0.65 | V | REFEN Rising | 4 | ||
| Shutdown Threshold | VIL | 0.2 | V | REFEN Falling | 4 | ||
| Current Limit Sourcing | ICL-Source | 2.1 | A | Sourcing | 4 | ||
| Current Limit Sinking | ICL-Sink | 2.1 | A | Sinking | 4 | ||
| Soft-Start Period | TSS | 1.4 | ms | VOUT=1.25V | 4 | ||
| Thermal Shutdown | TSD | 155 | ℃ | 4 | |||
| Thermal Shutdown Hysteresis | TSDH | 30 | ℃ | 4 | |||
| VIN Supply Voltage | VIN | 6 | V | 3 | |||
| Control Voltage | VCNTL | 6 | V | 3 | |||
| Storage Temperature Range | TST | -40 | 150 | ℃ | 3 | ||
| Thermal Resistance Junction to Case | θJC | 15 | ℃/W | 3 | |||
| Thermal Resistance Junction to Ambient | θJA | 40 | ℃/W | PCB copper area approx 1.5 in2 connected to exposed pad | 3 | ||
| Input Voltage | VIN | 1.3 | V | 1.3 to VCNTL | 4 | ||
| Ambient Temperature | TA | -40 | 85 | ℃ | 4 | ||
| Junction Temperature | TJ | -40 | 125 | ℃ | 4 |
CAD (KiCad official)
- Symbol:
SE9175-HF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
se9175-hf-etched.step/se9175-hf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);se9175-hf.step/se9175-hf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Seaward Elec datasheet (10 pp, sha256
0a60142606cb6c8b, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SE9175-HF
**Seaward Elec** · Battery Management ICs · SOP-8-EP
SE9175-HF from Seaward Elec, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage pin; recommended range 1.3 V to VCNTL, absolute maximum 6 V. |
| 2 | GND | power_in | Ground pin. |
| 3 | REFEN | input | Reference voltage input and chip enable pin; rising above 0.65 V enables, falling below 0.2 V shuts down the output to high impedance. |
| 4 | VOUT | output | Output voltage pin that sinks or sources up to 2A (current limit min 2.1 A) while tracking the REFEN voltage. |
| 5 | NC | unconnected | No connect pin. |
| 6 | VCNTL | power_in | Supply input and gate drive voltage pin; recommended 5 V or 3.3 V, absolute maximum 6 V. |
| 7 | NC | unconnected | No connect pin. |
| 8 | NC | unconnected | No connect pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Seaward Elec |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate Drive Voltage Range | VCNTL | 3.3 | | 5.5 | V | | 4 |
| POR Threshold | VCNTLRTH | | 2.55 | | V | | 4 |
| POR Hysteresis | VCNTL | | 0.1 | | V | | 4 |
| Input Voltage | VIN | 1.3 | | | V | max is VCNTL | 4 |
| Quiescent Current | ICNTL | | 1 | 3 | mA | IOUT=0A | 4 |
| Standby Current | ISTBY | | 1 | 10 | uA | IOUT=0A, VREFEN=0V | 4 |
| Output Offset Voltage | VOS | -20 | | 20 | mV | IOUT=0A | 4 |
| Load Regulation | ΔVLOAD | -20 | 0.5 | 20 | % | IOUT=±2.0A | 4 |
| Shutdown Threshold Enable | VIH | 0.65 | | | V | REFEN Rising | 4 |
| Shutdown Threshold | VIL | | | 0.2 | V | REFEN Falling | 4 |
| Current Limit Sourcing | ICL-Source | 2.1 | | | A | Sourcing | 4 |
| Current Limit Sinking | ICL-Sink | 2.1 | | | A | Sinking | 4 |
| Soft-Start Period | TSS | | 1.4 | | ms | VOUT=1.25V | 4 |
| Thermal Shutdown | TSD | | 155 | | ℃ | | 4 |
| Thermal Shutdown Hysteresis | TSDH | | 30 | | ℃ | | 4 |
| VIN Supply Voltage | VIN | | | 6 | V | | 3 |
| Control Voltage | VCNTL | | | 6 | V | | 3 |
| Storage Temperature Range | TST | -40 | | 150 | ℃ | | 3 |
| Thermal Resistance Junction to Case | θJC | | | 15 | ℃/W | | 3 |
| Thermal Resistance Junction to Ambient | θJA | | | 40 | ℃/W | PCB copper area approx 1.5 in2 connected to exposed pad | 3 |
| Input Voltage | VIN | 1.3 | | | V | 1.3 to VCNTL | 4 |
| Ambient Temperature | TA | -40 | | 85 | ℃ | | 4 |
| Junction Temperature | TJ | -40 | | 125 | ℃ | | 4 |
## CAD (KiCad official)
- Symbol: `SE9175-HF`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `se9175-hf-etched.step` / `se9175-hf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `se9175-hf.step` / `se9175-hf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Seaward Elec datasheet](docs/se9175-hf-datasheet.pdf) (10 pp, sha256 `0a60142606cb6c8b`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/se9175-hf-datasheet.pdf)