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SE4606S

SINO IC · MOSFETs · SOP-8

SE4606S from SINO IC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of the N-channel MOSFET (channel 1, VDS = 30V).
2 G1 input Gate of the N-channel MOSFET (channel 1), VGS max ±20V.
3 S2 passive Source of the P-channel MOSFET (channel 2, VDS = -30V).
4 G2 input Gate of the P-channel MOSFET (channel 2), VGS max ±20V.
5 D2 passive Drain of the P-channel MOSFET (channel 2), continuous ID -5A, tied to pin 6.
6 D2 passive Drain of the P-channel MOSFET (channel 2), continuous ID -5A, tied to pin 5.
7 D1 passive Drain of the N-channel MOSFET (channel 1), continuous ID 5A, tied to pin 8.
8 D1 passive Drain of the N-channel MOSFET (channel 1), continuous ID 5A, tied to pin 7.

Key specifications

Parameter Value
Manufacturer SINO IC
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage (N-Channel) VDS 30 V 1
Drain-Source Voltage (P-Channel) VDS -30 V 1
Gate-Source Voltage (N-Channel and P-Channel) VGS -20 20 V 1
Drain Current Continuous (N-Channel) ID 5 A 1
Drain Current Continuous (P-Channel) ID -5 A 1
Drain Current Pulsed (N-Channel) ID 70 A 1
Drain Current Pulsed (P-Channel) ID -70 A 1
Total Power Dissipation PD 1 W TA=25℃ 1
Operating Junction Temperature Range TJ -55 150 ℃ 1
Thermal Resistance from Junction to Ambient (N-Channel) RθJA 48 62.5 ℃/W 1
Thermal Resistance from Junction to Ambient (P-Channel) RθJA 48 62.5 ℃/W 1
N-Channel Drain-Source Breakdown Voltage BVDSS 30 V VGS=0V, ID=250μA 2
N-Channel Drain to Source Leakage Current IDSS 1 μA VDS=24V, VGS=0V 2
N-Channel Gate-Body Leakage Current IGSS 100 nA VGS=20V 2
N-Channel Gate Threshold Voltage VGS(th) 0.6 1 1.5 V VDS= VGS, ID=250μA 2
N-Channel Static Drain-Source On-Resistance RDS(ON) 24 30 mΩ VGS=10V, ID=3.6A 2
N-Channel Static Drain-Source On-Resistance RDS(ON) 39 48 mΩ VGS=4.5V, ID=3.0A 2
N-Channel Drain-Source Diode Forward Voltage VSD 0.7 1 V VGS=0V,IS=1A 2
P-Channel Drain-Source Breakdown Voltage BVDSS -30 V ID=-250μA, VGS=0V 3
P-Channel Drain to Source Leakage Current IDSS 1 μA VDS=-30V, VGS=0V 3
P-Channel Gate-Body Leakage Current IGSS 100 nA VGS=20V 3
P-Channel Gate Threshold Voltage VGS(th) -0.6 -1 -1.5 V VDS=VGS, ID=250μA 3
P-Channel Static Drain-Source On-Resistance RDS(ON) 37 47 mΩ VGS=-10V, ID=-4.1A 3
P-Channel Static Drain-Source On-Resistance RDS(ON) 47 60 mΩ VGS=-4.5V, ID=-3.5A 3
P-Channel Drain-Source Diode Forward Voltage VSD -0.7 -1.2 V VGS=0V,IS=-1A 3
N-Channel Input Capacitance Ciss 400 pF VGS=0V, VDS=15V, f=1MHz 2
N-Channel Output Capacitance Coss 45 pF VGS=0V, VDS=15V, f=1MHz 2
N-Channel Reverse Transfer Capacitance Crss 70 pF VGS=0V, VDS=15V, f=1MHz 2
N-Channel Total Gate Charge Qg 5.2 nC VGS=10V, VDD=15V, ID=3A 2
N-Channel Gate Source Charge Qgs 0.8 nC 2
N-Channel Gate Drain Charge Qgd 1.3 nC 2
N-Channel Turn-On Delay Time td(on) 4.5 ns VDD=15V, RGEN=3.0Ω 2
N-Channel Turn-Off Delay Time td(off) 14.5 ns 2
N-Channel Turn-On Rise Time td(r) 2.5 ns 2
N-Channel Turn-Off Fall Time td(f) 3.5 ns 2
P-Channel Input Capacitance Ciss 1000 pF VGS=0V, VDS=-15V, f=1MHz 3
P-Channel Output Capacitance Coss 175 pF VGS=0V, VDS=-15V, f=1MHz 3
P-Channel Reverse Transfer Capacitance Crss 105 pF VGS=0V, VDS=-15V, f=1MHz 3
P-Channel Total Gate Charge Qg 18 nC VGS=-4.5V, VDS=-15V, ID=-3A 3
P-Channel Gate Source Charge Qgs 3.2 nC 3
P-Channel Gate Drain Charge Qgd 4.4 nC 3
P-Channel Turn-On Delay Time td(on) 10 ns VGS=-10V, VDS=-15V, RGEN=3Ω 3
P-Channel Turn-Off Delay Time td(off) 24 ns 3
P-Channel Turn-On Rise Time td(r) 31 ns 3
P-Channel Turn-Off Fall Time td(f) 28 ns 3

CAD (KiCad official)

  • Symbol: SE4606S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: se4606s-etched.step / se4606s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); se4606s.step / se4606s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SINO IC datasheet (8 pp, sha256 8ea2df63c5a7667d, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF