main
Ray sdv1005e5r5c500nptf: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 0ce17ff 1mo ago
{
  "slug": "sdv1005e5r5c500nptf",
  "version": "0.1.0",
  "type": "component",
  "description": "Sunlord Varistors, 0402. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "circuit protection",
    "sdv1005e5r5c500nptf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sdv1005e5r5c500nptf.kicad_sym",
    "sdv1005e5r5c500nptf.kicad_mod",
    "sdv1005e5r5c500nptf.glb",
    "sdv1005e5r5c500nptf.step",
    "sdv1005e5r5c500nptf.lbr",
    "docs/hero.png",
    "docs/sdv1005e5r5c500nptf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "component": {
    "mpn": "SDV1005E5R5C500NPTF",
    "manufacturer": "Sunlord",
    "package": "0402",
    "pin_count": 2,
    "category": "Circuit Protection",
    "subcategory": "Varistors",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755185815490715648",
    "parts": {
      "symbol": "sdv1005e5r5c500nptf.kicad_sym",
      "footprint": "sdv1005e5r5c500nptf.kicad_mod",
      "model_3d": "sdv1005e5r5c500nptf.glb",
      "model_3d_step": "sdv1005e5r5c500nptf.step",
      "lbr": "sdv1005e5r5c500nptf.lbr"
    },
    "distributor_links": {
      "lcsc": "C279822"
    },
    "pins": [
      {
        "number": "1",
        "name": "T1",
        "type": "passive",
        "description": "End-cap electrode 1 of the non-polarized ESD-protection chip varistor; one of two symmetric terminals; max DC working voltage 5.5 V (product code 5R5, page 1 product-identification table); Sn-plated termination (code N); rated for operating temperature −55 °C to +125 °C (page 1)."
      },
      {
        "number": "2",
        "name": "T2",
        "type": "passive",
        "description": "End-cap electrode 2 of the non-polarized ESD-protection chip varistor; electrically symmetric with pin 1; ~50 pF typical inter-terminal capacitance at 1 MHz as decoded from product code C500 via the EIA 3-digit convention (page 1 example: C121 = 120 pF); Sn-plated termination (code N)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.2",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.2",
        "primary_model": "claude-sonnet-4-6",
        "primary_mode": "vision",
        "consensus_model": "claude-opus-4-7",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SDV1005E5R5C500NPTF (5R5 = 5.5 V varistor voltage) does not appear as an explicit row in the SDV; Capacitance code interpretation: page 1 gives the example C121 = 120 pF (standard EIA 3-digit code: ; Pin numbers '1' and '2' are conventional for a 2-terminal leaded/chip package. The dimensional drawi",
          "vision extraction: provenance cannot be text-verified; needs consensus"
        ],
        "pages_sent": 6,
        "cost_usd": 0.3689,
        "at": "2026-09-17T19:44:19"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755185815490715648",
        "pages": 6,
        "sha256": "ecc8abb126e1552c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 2,
        "described": 2,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "sdv1005e5r5c500nptf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.0,
          0.5,
          0.35
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "91507e5af4251cb4ef38e04889c9b98da29904432bd83786bba13ae9b605eacb",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sdv1005e5r5c500nptf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          1.0,
          0.5,
          0.35
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "322c5037f4c20b2b6c9b838a12c7a9bf300d54f173fdb6724617235fb86e5843",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}