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SDM40E20LC-7

Public Made by Adom

by adom

Diodes Incorporated Schottky Diodes, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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Datasheet

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Contents

README

markdown

SDM40E20LC-7

Diodes Incorporated · Schottky Diodes · SOT-23

SDM40E20LC-7 from Diodes Incorporated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 passive Anode of the first Schottky diode (SDM40E20LC common-cathode pair), rated 20V VRRM/VR and 0.4A continuous forward current per the datasheet.
2 A2 passive Anode of the second Schottky diode (SDM40E20LC common-cathode pair), rated 20V VRRM/VR and 0.4A continuous forward current per the datasheet.
3 K passive Common cathode of both Schottky diodes (top pin in the SDM40E20LC diagram), with 20V DC blocking voltage per diode.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package SOT-23
Category Diodes
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reverse Breakdown Voltage V(BR)R 20 V IR = 0.5mA 2
Forward Voltage Drop VF 0.31 V IF = 0.1A 2
Forward Voltage Drop VF 0.43 V IF = 0.5A 2
Leakage Current IR 100 µA VR = 10V 2
Leakage Current IR 250 µA VR = 20V 2
Peak Repetitive Reverse Voltage / Working Peak Reverse Voltage / DC Blocking Voltage VRRM/VRWM/VR 20 V 2
RMS Reverse Voltage VR(RMS) 14 V 2
Forward Continuous Current IFM 0.4 A Note 5 2
Non-Repetitive Peak Forward Surge Current IFSM 2 A 8.3ms single half sine-wave superimposed on rated load 2
Power Dissipation PD 225 mW Note 5: FR-5 1.0 x 0.75 x 0.062 inch PCB pad layout 2
Power Dissipation PD 300 mW Note 6: Alumina PCB, 0.4 inch x 0.3 inch x 0.024 inch pad layout 2
Typical Thermal Resistance Junction to Ambient RJA 444 C/W Note 5: FR-5 1.0 x 0.75 x 0.062 inch PCB pad layout 2
Typical Thermal Resistance Junction to Ambient RJA 333 C/W Note 6: Alumina PCB, 0.4 inch x 0.3 inch x 0.024 inch pad layout 2
Operating and Storage Temperature Range TJ, TSTG -65 125 C 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin  Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 1

CAD (KiCad official)

  • Symbol: SDM40E20LC-7
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: sdm40e20lc-7-etched.step / sdm40e20lc-7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sdm40e20lc-7.step / sdm40e20lc-7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (5 pp, sha256 f5fc00ecff23a560, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF