SCT9336STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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SCT9336STER
SCT · DC-DC Converters · ESOP-8
SCT9336STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap supply for the high-side power MOSFET gate driver. Connect a ≥0.1µF ceramic capacitor between BOOT and SW to develop the high-side gate drive voltage above the switching node. |
| 2 | VIN | power_in | Power supply input, 3.8V to 28V operating range (absolute max 34V). Must be locally bypassed with a low-ESR ceramic capacitor close to the pin. |
| 3 | EN | input | Enable logic input. Floating (internal pull-up) enables the device; can be tied directly to VIN (up to 34V absolute max). Precision UVLO thresholds: 1.18V rising / 1.1V falling for programmable UVLO via a resistor divider. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 5 | FB | input | Buck converter output feedback sensing input. Connect a resistor divider from VOUT to FB to program the output voltage; internal reference is 0.8V ±1% (0.792V-0.808V). Absolute max 5.5V. |
| 6 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 7 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 8 | SW | power_out | Switching node of the buck converter; junction of the internal high-side and low-side MOSFETs. Connect to the external inductor. Absolute max -0.3V to 34V. |
| 9 | GND | power_in | Exposed thermal pad - device ground return and primary heat dissipation path. Must be soldered to a PCB ground plane for proper electrical operation and thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
SCT9336STER
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| BST pin voltage | -0.3 | 40 | V | 2 | |||
| VIN, SW, EN pin voltage | -0.3 | 34 | V | 2 | |||
| BST-SW voltage | -0.3 | 6 | V | 2 | |||
| FB pin voltage | -0.3 | 5.5 | V | 2 | |||
| Operating junction temperature | -40 | 125 | °C | 2 | |||
| Storage temperature | TSTG | -65 | 150 | °C | 2 | ||
| Input voltage range | VIN | 3.8 | 28 | V | 3 | ||
| Operating junction temperature | TJ | -40 | 125 | °C | 3 | ||
| Operating input voltage | VIN | 3.8 | 28 | V | 3 | ||
| Feedback voltage | VFB | 0.792 | 0.8 | 0.808 | V | 4 | |
| HSD peak current limit | ILIM_HSD | 6.7 | 7.5 | 8.3 | A | 4 | |
| LSD valley current limit | ILIM_LSD | 6.2 | 7 | 7.8 | A | 4 | |
| Switching frequency | FSW | 360 | 400 | 440 | kHz | VIN=12V, VOUT=5V | 4 |
| FSS jittering span | FJITTER | -6 | 6 | % | 4 | ||
| Junction to ambient thermal resistance | RθJA | 42 | °C/W | ESOP-8L | 3 | ||
| Junction to case thermal resistance | RθJC | 45.8 | °C/W | ESOP-8L | 3 |
CAD (KiCad official)
- Symbol:
SCT9336STER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
sct9336ster-etched.step/sct9336ster-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sct9336ster.step/sct9336ster.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sct9336ster.step |
193 KB | You want the bare part, or you mark your own boards. |
sct9336ster-etched.step |
2.4 MB | You want the part with SCT9336STER already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 565 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (20 pp, sha256
4d5d86a19a2bc8e9, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SCT9336STER
**SCT** · DC-DC Converters · ESOP-8
SCT9336STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap supply for the high-side power MOSFET gate driver. Connect a ≥0.1µF ceramic capacitor between BOOT and SW to develop the high-side gate drive voltage above the switching node. |
| 2 | VIN | power_in | Power supply input, 3.8V to 28V operating range (absolute max 34V). Must be locally bypassed with a low-ESR ceramic capacitor close to the pin. |
| 3 | EN | input | Enable logic input. Floating (internal pull-up) enables the device; can be tied directly to VIN (up to 34V absolute max). Precision UVLO thresholds: 1.18V rising / 1.1V falling for programmable UVLO via a resistor divider. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 5 | FB | input | Buck converter output feedback sensing input. Connect a resistor divider from VOUT to FB to program the output voltage; internal reference is 0.8V ±1% (0.792V-0.808V). Absolute max 5.5V. |
| 6 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 7 | NC | unconnected | No internal connection. Leave floating or tie to ground per PCB layout convenience. |
| 8 | SW | power_out | Switching node of the buck converter; junction of the internal high-side and low-side MOSFETs. Connect to the external inductor. Absolute max -0.3V to 34V. |
| 9 | GND | power_in | Exposed thermal pad - device ground return and primary heat dissipation path. Must be soldered to a PCB ground plane for proper electrical operation and thermal performance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
## Ordering variants
Same part, different packaging or reel option.
- `SCT9336STER`
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| BST pin voltage | | -0.3 | | 40 | V | | 2 |
| VIN, SW, EN pin voltage | | -0.3 | | 34 | V | | 2 |
| BST-SW voltage | | -0.3 | | 6 | V | | 2 |
| FB pin voltage | | -0.3 | | 5.5 | V | | 2 |
| Operating junction temperature | | -40 | | 125 | °C | | 2 |
| Storage temperature | TSTG | -65 | | 150 | °C | | 2 |
| Input voltage range | VIN | 3.8 | | 28 | V | | 3 |
| Operating junction temperature | TJ | -40 | | 125 | °C | | 3 |
| Operating input voltage | VIN | 3.8 | | 28 | V | | 3 |
| Feedback voltage | VFB | 0.792 | 0.8 | 0.808 | V | | 4 |
| HSD peak current limit | ILIM_HSD | 6.7 | 7.5 | 8.3 | A | | 4 |
| LSD valley current limit | ILIM_LSD | 6.2 | 7 | 7.8 | A | | 4 |
| Switching frequency | FSW | 360 | 400 | 440 | kHz | VIN=12V, VOUT=5V | 4 |
| FSS jittering span | FJITTER | -6 | | 6 | % | | 4 |
| Junction to ambient thermal resistance | RθJA | | 42 | | °C/W | ESOP-8L | 3 |
| Junction to case thermal resistance | RθJC | | 45.8 | | °C/W | ESOP-8L | 3 |
## CAD (KiCad official)
- Symbol: `SCT9336STER`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `sct9336ster-etched.step` / `sct9336ster-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct9336ster.step` / `sct9336ster.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`sct9336ster.step`](sct9336ster.step) | 193 KB | You want the bare part, or you mark your own boards. |
| [`sct9336ster-etched.step`](sct9336ster-etched.step) | 2.4 MB | You want the part with `SCT9336STER` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 565 faces against 63 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SCT datasheet](docs/sct9336ster-datasheet.pdf) (20 pp, sha256 `4d5d86a19a2bc8e9`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sct9336ster-datasheet.pdf)