component
SCT2A26STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SCT2A26STER
SCT · DC-DC Converters · ESOP-8
SCT2A26STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the device, to be connected to the thermal pad and the PCB ground plane. |
| 2 | VIN | power_in | Input supply voltage with a recommended range of 5.5 V to 100 V, bypassed to GND with a local capacitor placed as close as possible to the pins. |
| 3 | EN | input | Enable input with an internal pull-up current source (2.1 µA at EN = 1.5 V); pull below 1.23 V to disable the converter, float to enable, with an enable high threshold of 1.25 V. |
| 4 | NC | unconnected | Not connected internally. |
| 5 | FB | input | Inverting input of the error comparator, regulated to 1.2 V typical (1.188 V to 1.212 V), with an external resistor divider from the output setting VOUT; absolute maximum -0.3 V to 6 V. |
| 6 | TM | input | Test mode pin for factory use only, to be connected to EN, ground, or left floating; absolute maximum -0.3 V to 6 V. |
| 7 | BST | power_out | Bootstrap supply for the high-side MOSFET gate driver, requiring a 0.1 µF ceramic capacitor from BST to SW; BST-SW absolute maximum is 6 V. |
| 8 | SW | output | Regulator switching output connected to the external power inductor; absolute range -1 V to 110 V. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND, and must be soldered to a ground plane on the PCB for proper operation and thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range (recommended) | VIN | 5.5 | 100 | V | 3 | ||
| Output voltage range (recommended) | VOUT | 1.2 | 30 | V | 3 | ||
| Operating junction temperature (recommended) | TJ | -40 | 150 | °C | 3 | ||
| VIN absolute maximum | VIN | -0.3 | 110 | V | 2 | ||
| BST absolute maximum | BST | -0.3 | 116 | V | 2 | ||
| SW absolute maximum | SW | -1 | 110 | V | 2 | ||
| BST-SW absolute maximum | BST-SW | -0.3 | 6 | V | 2 | ||
| EN, FB, TM absolute maximum | EN, FB, TM | -0.3 | 6 | V | 2 | ||
| Operating junction temperature (absolute maximum) | TJ | -40 | 150 | °C | 2 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 2 | ||
| Operating input voltage | VIN | 5.5 | 100 | V | 4 | ||
| VIN UVLO threshold | VUVLO | 4.7 | 5 | 5.3 | V | VIN rising | 4 |
| Shutdown current from VIN pin | ISHDN | 4.2 | 10 | μA | EN=0, no load | 4 | |
| Quiescent current from VIN pin | IQ | 140 | 240 | μA | EN floating, no load, non-switching, BOOT-SW=5V | 4 | |
| High-side MOSFET on-resistance | RDSON_H | 500 | 950 | mΩ | VBOOT-VSW=5V | 4 | |
| Reference voltage of FB | VREF | 1.188 | 1.2 | 1.212 | V | 4 | |
| Switching frequency | FSW | 260 | 300 | 340 | kHz | 4 | |
| Minimum off-time | TOFF_MIN | 200 | 260 | ns | 4 | ||
| HS MOSFET current limit | ILIM | 3.5 | 4 | 4.5 | A | TJ=25°C | 4 |
| HS MOSFET current limit | ILIM | 3.3 | 4 | 4.7 | A | TJ=-40°C~125°C | 4 |
| Junction to ambient thermal resistance | RθJA | 42 | °C/W | 3 | |||
| Junction to case thermal resistance | RθJC | 45.8 | °C/W | 3 |
CAD (KiCad official)
- Symbol:
SCT2A26STER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
sct2a26ster-etched.step/sct2a26ster-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sct2a26ster.step/sct2a26ster.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (18 pp, sha256
f5386fd67ecb5661, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SCT2A26STER
**SCT** · DC-DC Converters · ESOP-8
SCT2A26STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the device, to be connected to the thermal pad and the PCB ground plane. |
| 2 | VIN | power_in | Input supply voltage with a recommended range of 5.5 V to 100 V, bypassed to GND with a local capacitor placed as close as possible to the pins. |
| 3 | EN | input | Enable input with an internal pull-up current source (2.1 µA at EN = 1.5 V); pull below 1.23 V to disable the converter, float to enable, with an enable high threshold of 1.25 V. |
| 4 | NC | unconnected | Not connected internally. |
| 5 | FB | input | Inverting input of the error comparator, regulated to 1.2 V typical (1.188 V to 1.212 V), with an external resistor divider from the output setting VOUT; absolute maximum -0.3 V to 6 V. |
| 6 | TM | input | Test mode pin for factory use only, to be connected to EN, ground, or left floating; absolute maximum -0.3 V to 6 V. |
| 7 | BST | power_out | Bootstrap supply for the high-side MOSFET gate driver, requiring a 0.1 µF ceramic capacitor from BST to SW; BST-SW absolute maximum is 6 V. |
| 8 | SW | output | Regulator switching output connected to the external power inductor; absolute range -1 V to 110 V. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND, and must be soldered to a ground plane on the PCB for proper operation and thermal performance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range (recommended) | VIN | 5.5 | | 100 | V | | 3 |
| Output voltage range (recommended) | VOUT | 1.2 | | 30 | V | | 3 |
| Operating junction temperature (recommended) | TJ | -40 | | 150 | °C | | 3 |
| VIN absolute maximum | VIN | -0.3 | | 110 | V | | 2 |
| BST absolute maximum | BST | -0.3 | | 116 | V | | 2 |
| SW absolute maximum | SW | -1 | | 110 | V | | 2 |
| BST-SW absolute maximum | BST-SW | -0.3 | | 6 | V | | 2 |
| EN, FB, TM absolute maximum | EN, FB, TM | -0.3 | | 6 | V | | 2 |
| Operating junction temperature (absolute maximum) | TJ | -40 | | 150 | °C | | 2 |
| Storage temperature | TSTG | -65 | | 150 | °C | | 2 |
| Operating input voltage | VIN | 5.5 | | 100 | V | | 4 |
| VIN UVLO threshold | VUVLO | 4.7 | 5 | 5.3 | V | VIN rising | 4 |
| Shutdown current from VIN pin | ISHDN | | 4.2 | 10 | μA | EN=0, no load | 4 |
| Quiescent current from VIN pin | IQ | | 140 | 240 | μA | EN floating, no load, non-switching, BOOT-SW=5V | 4 |
| High-side MOSFET on-resistance | RDSON_H | | 500 | 950 | mΩ | VBOOT-VSW=5V | 4 |
| Reference voltage of FB | VREF | 1.188 | 1.2 | 1.212 | V | | 4 |
| Switching frequency | FSW | 260 | 300 | 340 | kHz | | 4 |
| Minimum off-time | TOFF_MIN | | 200 | 260 | ns | | 4 |
| HS MOSFET current limit | ILIM | 3.5 | 4 | 4.5 | A | TJ=25°C | 4 |
| HS MOSFET current limit | ILIM | 3.3 | 4 | 4.7 | A | TJ=-40°C~125°C | 4 |
| Junction to ambient thermal resistance | RθJA | | 42 | | °C/W | | 3 |
| Junction to case thermal resistance | RθJC | | 45.8 | | °C/W | | 3 |
## CAD (KiCad official)
- Symbol: `SCT2A26STER`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `sct2a26ster-etched.step` / `sct2a26ster-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct2a26ster.step` / `sct2a26ster.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SCT datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903020056502272) (18 pp, sha256 `f5386fd67ecb5661`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sct2a26ster-datasheet.pdf)