component
SCT2A25STER
Public Made by Adomby adom
SCT DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SCT2A25STER
SCT · DC-DC Converters · ESOP-8
SCT2A25STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Inverting input of the comparator; the external feedback divider from output to GND sets the output, and the device regulates FB to the internal 1.2V typical reference. |
| 2 | NC | unconnected | Not connected (labelled 'Not Connection' in the datasheet pin table). |
| 3 | VIN | power_in | Input supply voltage, rated 5.5V to 100V; connect a local bypass capacitor from VIN to GND with the path kept as short as possible. |
| 4 | BST | power_out | Bias supply for the high-side MOSFET gate driver; connect a 0.1uF capacitor from BST to SW, with a capacitor rated 10V or higher recommended. |
| 5 | SW | output | Regulator switching output; connect to the external power inductor and catch diode. |
| 6 | TM | input | Test mode pin for factory use only; connect to EN, to ground, or leave floating. |
| 7 | EN | input | Enable input with internal pull-up current source; pull below 1.23V to disable the converter and float to enable it (EN high threshold 1.25V typical). |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND; must be connected to a ground plane on the PCB for proper operation and thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
SCT2A25STER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
sct2a25ster-etched.step/sct2a25ster-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sct2a25ster.step/sct2a25ster.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (18 pp, sha256
872dbb03254ed943, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SCT2A25STER
**SCT** · DC-DC Converters · ESOP-8
SCT2A25STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Inverting input of the comparator; the external feedback divider from output to GND sets the output, and the device regulates FB to the internal 1.2V typical reference. |
| 2 | NC | unconnected | Not connected (labelled 'Not Connection' in the datasheet pin table). |
| 3 | VIN | power_in | Input supply voltage, rated 5.5V to 100V; connect a local bypass capacitor from VIN to GND with the path kept as short as possible. |
| 4 | BST | power_out | Bias supply for the high-side MOSFET gate driver; connect a 0.1uF capacitor from BST to SW, with a capacitor rated 10V or higher recommended. |
| 5 | SW | output | Regulator switching output; connect to the external power inductor and catch diode. |
| 6 | TM | input | Test mode pin for factory use only; connect to EN, to ground, or leave floating. |
| 7 | EN | input | Enable input with internal pull-up current source; pull below 1.23V to disable the converter and float to enable it (EN high threshold 1.25V typical). |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND; must be connected to a ground plane on the PCB for proper operation and thermal performance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `SCT2A25STER`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `sct2a25ster-etched.step` / `sct2a25ster-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct2a25ster.step` / `sct2a25ster.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [SCT datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589784969036783616) (18 pp, sha256 `872dbb03254ed943`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sct2a25ster-datasheet.pdf)