# SCT2A11STER

**SCT** · DC-DC Converters · ESOP-8

SCT2A11STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the device. |
| 2 | VIN | power_in | Input supply voltage with a recommended range of 4.5 V to 100 V; connect a local bypass capacitor from VIN to GND with the path kept as short as possible. |
| 3 | EN | input | Enable pin with an internal pull-up current source; pulling it below 1.05 V disables the converter, while floating or connecting it to VIN enables the converter. |
| 4 | RT | input | Sets the internal oscillator frequency through a resistor to ground over a 300 kHz to 800 kHz range; the pin must not be left floating or shorted to ground. |
| 5 | FB | input | Inverting input of the transconductance error amplifier that regulates FB to the 0.8 V typical internal reference, with the output set by an external resistor divider. |
| 6 | NC | unconnected | Not connected; the datasheet gives no electrical function for this pin. |
| 7 | BST | power_out | Power supply bias for the high-side MOSFET gate driver; connect a 0.1 uF capacitor from BOOT to SW. |
| 8 | SW | output | Regulator switching output; connect to the external power inductor. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND and required to be connected to the PCB ground plane for proper operation and thermal performance. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range | VIN | 4.5 |  | 100 | V |  | 3 |
| Output voltage range | VOUT | 0.8 |  | 24 | V |  | 3 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 3 |
| VIN, EN voltage | VIN, EN | -0.3 |  | 105 | V |  | 2 |
| BOOT voltage | BOOT | -0.3 |  | 111 | V |  | 2 |
| SW voltage | SW | -1 |  | 105 | V |  | 2 |
| BOOT-SW voltage | BOOT-SW | -0.3 |  | 6 | V |  | 2 |
| FB, RT voltage | FB, RT | -0.3 |  | 6 | V |  | 2 |
| Ambient temperature | TA | -40 |  | 85 | °C |  | 2 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 2 |
| Storage temperature | TSTG | -65 |  | 150 | °C |  | 2 |
| Operating input voltage | VIN | 4.5 |  | 100 | V |  | 3 |
| Reference voltage of FB | VREF | 0.792 | 0.8 | 0.808 | V |  | 4 |
| Frequency range using RT mode | FRANGE_RT | 300 |  | 800 | kHz |  | 4 |
| Switching frequency | FSW | 420 | 500 | 600 | kHz | RRT=500 kΩ(1%) | 4 |

## CAD (KiCad official)

- Symbol: `SCT2A11STER`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `sct2a11ster-etched.step` / `sct2a11ster-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct2a11ster.step` / `sct2a11ster.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SCT datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588940946733453312) (18 pp, sha256 `d17eee7c6417a486`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sct2a11ster-datasheet.pdf)