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Contents

README

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SCT2632STER

SCT · DC-DC Converters · ESOP-8

SCT2632STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive Power supply bias for the high-side power MOSFET gate driver. Connect a 0.1 uF bootstrap capacitor from BOOT to SW; the capacitor is charged when SW voltage is low. Absolute max 72V; BOOT-SW max 6V.
2 VIN power_in Input supply voltage, 4.2V to 60V (absolute max 65V). Connect a local bypass capacitor from VIN to GND with the shortest possible high-frequency path.
3 EN input Enable pin with internal pull-up current source. Pull below 1.05V to disable the converter; float or tie to VIN to enable. A VIN-to-GND resistor divider on EN sets the input voltage lockout (UVLO) threshold. VEN_H ≈ 1.2V, VEN_L ≈ 1.05V.
4 RT/CLK bidirectional Sets the internal oscillator frequency (100 kHz-1.2 MHz) via a resistor to GND, or accepts an external clock for PLL synchronization (100 kHz-1.2 MHz). If external clock edges stop, operation reverts automatically to the resistor-programmed frequency.
5 FB input Inverting input of the trans-conductance error amplifier. Connect the tap of the external feedback resistor divider from VOUT to GND; the device regulates FB to VREF = 0.8V typical (0.792-0.808V).
6 SS passive Slow-start and tracking pin. An external capacitor sets the output rise time; SS current is ~2.6 uA. Because SS overrides the internal reference when lower, it can also be driven for tracking/sequencing.
7 GND power_in Device ground return.
8 SW power_out Regulator switching output; drain of the internal high-side MOSFET. Connect to the external power inductor. Absolute max -1V to 65V.
9 Thermal Pad power_in Exposed thermal pad on the underside of the ESOP-8 package for heat dissipation. Must be electrically connected to the GND pin and tied to a PCB ground plane for proper operation and thermal performance.

Key specifications

Parameter Value
Manufacturer SCT
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • SCT2632STER

CAD (KiCad official)

  • Symbol: SCT2632STER
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: sct2632ster-etched.step / sct2632ster-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sct2632ster.step / sct2632ster.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sct2632ster.step 125 KB You want the bare part, or you mark your own boards.
sct2632ster-etched.step 2.6 MB You want the part with SCT2632STER already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 613 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SCT datasheet (20 pp, sha256 eae824634ecd0535, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF