Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

SCT2632ASTER

SCT · DC-DC Converters · ESOP-8

SCT2632ASTER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT power_in Power supply bias for the high-side power MOSFET gate driver. Connect a 0.1µF bootstrap capacitor from BOOT to SW; the cap charges when SW is low. Absolute max 71V (BOOT-SW max 6V).
2 VIN power_in Input supply voltage, 4.5V to 60V operating range. Connect a local bypass capacitor from VIN to GND; the path from VIN to the high-frequency bypass cap and GND must be as short as possible.
3 EN input Enable pin with internal pull-up (1µA/4µA). Pull below 1.05V to disable; float or tie to VIN to enable. A resistor divider from VIN to GND on EN programs the input UVLO threshold (VEN_H = 1.2V typ).
4 RT/CLK bidirectional Sets the internal oscillator switching frequency (100kHz-1.2MHz) via a resistor to GND, or accepts an external clock for PLL synchronization. If the external clock stops, the part automatically reverts to the resistor-programmed frequency. Typical pin voltage 0.5V; do not float or short to GND.
5 FB input Inverting input of the trans-conductance error amplifier. External resistor divider from VOUT to GND to FB sets the output voltage; the device regulates FB to the internal 0.8V ±1% reference.
6 SS passive Soft-start programming pin. Connect a capacitor from SS to GND; an internal 3µA source charges CSS to program soft-start time (tSS = CSS × 0.8V / 3µA). Programmed soft-start time should be greater than 4ms.
7 GND power_in Device ground return. Bond to the ground plane together with the thermal pad.
8 SW power_out Regulator switching output - drain of the internal high-side MOSFET. Connect to the external power inductor. Absolute max range -1V to 65V.
9 Thermal Pad passive Exposed die-attach pad for heat dissipation. Electrically connected to GND (pin 7) and must be soldered to the PCB ground plane for correct operation and optimized thermal performance (θJA = 42°C/W on the standard board).

Key specifications

Parameter Value
Manufacturer SCT
Package ESOP-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • SCT2632ASTER

CAD (KiCad official)

  • Symbol: SCT2632ASTER
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: sct2632aster-etched.step / sct2632aster-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sct2632aster.step / sct2632aster.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
sct2632aster.step 125 KB You want the bare part, or you mark your own boards.
sct2632aster-etched.step 2.7 MB You want the part with SCT2632ASTER already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 639 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SCT datasheet (21 pp, sha256 675137521e5fc015, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF