# SCT2433STER

**SCT** · DC-DC Converters · ESOP-8

SCT2433STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_out | Power supply bias for the high-side MOSFET gate driver; connect a 0.1uF capacitor from BOOT to SW, with a BOOT-SW UVLO falling threshold of 2.36V and 300mV hysteresis. |
| 2 | NC | unconnected | Not connected; the datasheet assigns no function to this pin. |
| 3 | NC | unconnected | Not connected; the datasheet assigns no function to this pin. |
| 4 | FB | input | Inverting input of the transconductance error amplifier; the external divider tap regulates FB to the 0.8V typical reference (±1%), and the overvoltage protection trips at 110% of VREF. |
| 5 | EN | input | Enable pin with an internal pull-up current source; pull below 1.1V to disable the converter, float or tie to VIN to enable, and absolute maximum rating is -0.3V to 42V. |
| 6 | GND | power_in | Ground reference for the device; the thermal pad is electrically connected to this pin. |
| 7 | VIN | power_in | Input supply voltage with a 3.8V to 40V recommended operating range (absolute maximum -0.3V to 42V); place a local bypass capacitor from VIN to GND as close as possible. |
| 8 | SW | output | Regulator switching output that connects to the external power inductor; absolute maximum rating is -0.3V to 42V. |
| 9 | Thermal Pad | power_in | Heat dissipation path of the die, electrically connected to GND; it must be connected to a ground plane on the PCB for proper operation and optimized thermal performance. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |

## CAD (KiCad official)

- Symbol: `SCT2433STER`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `sct2433ster-etched.step` / `sct2433ster-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct2433ster.step` / `sct2433ster.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SCT datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907174982791168) (21 pp, sha256 `f57b93af533ada34`, retrieved 2026-10-10, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sct2433ster-datasheet.pdf)