# SCT2332TVBR

**SCT** · DC-DC Converters · TSOT-23-6L

SCT2332TVBR from SCT, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Buck converter output feedback sensing voltage. Connect a resistor divider from VOUT to FB to set the output voltage. The device regulates FB to the internal 0.8V (typical) reference. |
| 2 | EN | input | Enable logic input. Floating the pin enables the device. Supports high-voltage input up to VIN, so it may be tied directly to VIN for auto-enable. Precision enable thresholds (1.18V rising / 1.1V falling) allow programmable UVLO threshold and hysteresis via a resistor divider. |
| 3 | VIN | power_in | Power supply input, 3.8V to 32V operating range (absolute max 34V). Must be locally bypassed with a ceramic capacitor close to the pin. |
| 4 | GND | power_in | Power ground. Must be soldered directly to the ground plane for proper thermal dissipation and low-impedance return path. |
| 5 | SW | output | Switching node of the buck converter. Connect to the external inductor. Absolute max -0.3V to 34V. |
| 6 | BST | power_in | Bootstrap supply for the high-side power MOSFET gate driver. Connect a 0.1uF or greater ceramic capacitor between BST and SW. Absolute max -0.3V to 40V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | TSOT-23-6L |
| Category | PMIC |
| Pins | 6 |

## Ordering variants

Same part, different packaging or reel option.

- `SCT2332TVBR`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| BST voltage | BST | -0.3 |  | 40 | V |  | 2 |
| VIN, SW, EN voltage | VIN, SW, EN | -0.3 |  | 34 | V |  | 2 |
| VS, FB voltage | VS, FB | -0.3 |  | 5.5 | V |  | 2 |
| Operating junction temperature |  | -40 |  | 125 | C |  | 2 |
| Storage temperature | TSTG | -65 |  | 150 | C |  | 2 |
| Input voltage range | VIN | 3.8 |  | 32 | V |  | 3 |
| Operating junction temperature | TJ | -40 |  | 125 | °C |  | 3 |
| ESD Human Body Model (HBM), all pins | VESD | -2 |  | 2 | kV | Human Body Model (HBM), per ANSI-JEDEC-JS-001-2014, all pins | 3 |
| ESD Charged Device Model (CDM), all pins | VESD | -0.5 |  | 0.5 | kV | Charged Device Model (CDM), per ANSI-JEDEC-JS-002-2014, all pins | 3 |
| Operating input voltage | VIN | 3.8 |  | 32 | V |  | 3 |
| Input UVLO, VIN rising | VIN_UVLO |  | 3.5 | 3.7 | V | VIN rising | 3 |
| Shutdown current | ISD |  | 1 | 3 | uA | EN=0, No load, VIN=12V | 3 |
| Quiescent current | IQ |  |  | 250 | uA | EN=floating, No load, No switching. VIN=12V. BST-SW=5V | 3 |
| Enable high threshold | VEN_H |  | 1.18 | 1.25 | V |  | 3 |
| Enable low threshold | VEN_L | 1.03 | 1.1 |  | V |  | 3 |
| Enable pin input current | IEN | 1 | 1.5 | 2 | uA | EN=1V | 3 |
| Feedback voltage | VFB | 0.792 | 0.8 | 0.808 | V |  | 4 |
| HSD peak current limit | ILIM_HSD | 4 | 4.5 | 5 | A |  | 4 |
| LSD valley current limit | ILIM_LSD | 3.2 | 4 | 4.8 | A |  | 4 |
| Switching frequency | FSW | 360 | 400 | 440 | kHz | VIN=12V, VOUT=5V | 4 |
| Input UVLO hysteresis |  |  | 420 |  | mV |  | 3 |
| Enable pin hysteresis current | IEN_HYS |  | 4 |  | uA | EN=1.5V | 3 |
| High side FET on-resistance | RDSON_H |  | 80 |  | mΩ |  | 3 |
| Low side FET on-resistance | RDSON_L |  | 42 |  | mΩ |  | 4 |
| Minimum on-time | tON_MIN |  | 80 |  | ns |  | 4 |
| Internal soft-start time | tSS |  | 4 |  | ms |  | 4 |
| Output OVP threshold | VOVP |  | 110 |  | % | VOUT rising | 4 |
| Output OVP hysteresis |  |  | 5 |  | % |  | 4 |
| OCP hiccup wait time | THIC_W |  | 512 |  | Cycles |  | 4 |
| OCP hiccup restart time | THIC_R |  | 8192 |  | Cycles |  | 4 |
| Thermal shutdown threshold | TSD |  | 160 |  | °C | TJ rising | 4 |
| Thermal shutdown hysteresis |  |  | 25 |  |  |  | 4 |
| Junction to ambient thermal resistance | RθJA |  | 89 |  | °C/W |  | 3 |
| Junction to case thermal resistance | RθJC |  | 39 |  | °C/W |  | 3 |

## CAD (KiCad official)

- Symbol: `SCT2332TVBR`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: TSOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `sct2332tvbr-etched.step` / `sct2332tvbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sct2332tvbr.step` / `sct2332tvbr.glb` are the bare package body.

## 3D model downloads

Two STEP files. Same geometry, different body top:

| File | Size | Use it when |
|---|---|---|
| [`sct2332tvbr.step`](sct2332tvbr.step) | 97 KB | You want the bare part, or you mark your own boards. |
| [`sct2332tvbr-etched.step`](sct2332tvbr-etched.step) | 2.3 MB | You want the part with `SCT2332TVBR` already on it. |

The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 547 faces against 117 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [SCT datasheet](docs/sct2332tvbr-datasheet.pdf) (20 pp, sha256 `2450a3567deac868`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sct2332tvbr-datasheet.pdf)