component
SCAN90CP02VY
Public Made by Adomby adom
Texas Instruments Signal Switches, Multiplexers, Decoders, LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "scan90cp02vy",
"title": "SCAN90CP02VY",
"brief": "Texas Instruments Signal Switches, Multiplexers, Decoders, LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"scan90cp02vy",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "SCAN90CP02VY",
"manufacturer": "Texas Instruments",
"package": "LQFP-32(7x7)",
"pin_count": 32,
"category": "Logic",
"subcategory": "Signal Switches, Multiplexers, Decoders",
"datasheet": "https://www.ti.com/cn/lit/gpn/scan90cp02",
"parts": {
"symbol": "scan90cp02vy.kicad_sym",
"footprint": "scan90cp02vy.kicad_mod",
"model_3d": "scan90cp02vy-hero.glb",
"model_3d_plain": "scan90cp02vy.glb",
"model_3d_step": "scan90cp02vy-etched.step",
"model_3d_step_plain": "scan90cp02vy.step",
"lbr": "scan90cp02vy.lbr"
},
"distributor_links": {
"lcsc": "C1547287",
"mouser": "926-SCAN90CP02VY"
},
"distributor_check": {
"checked_at": "2026-10-11T03:50:26Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": "926-SCAN90CP02VY",
"status": "found",
"lifecycle": "Obsolete"
}
},
"pins": [
{
"number": "1",
"name": "PEM11",
"type": "input",
"description": "Channel 1 output pre-emphasis control input (LVTTL), which together with PEM10 selects 0/25/50/100% pre-emphasis per Table 1."
},
{
"number": "2",
"name": "PEM10",
"type": "input",
"description": "Channel 1 output pre-emphasis control input (LVTTL), which together with PEM11 selects 0/25/50/100% pre-emphasis per Table 1."
},
{
"number": "3",
"name": "PEM01",
"type": "input",
"description": "Channel 0 output pre-emphasis control input (LVTTL), which together with PEM00 selects 0/25/50/100% pre-emphasis per Table 1."
},
{
"number": "4",
"name": "PEM00",
"type": "input",
"description": "Channel 0 output pre-emphasis control input (LVTTL), which together with PEM01 selects 0/25/50/100% pre-emphasis per Table 1."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "6",
"name": "SEL1",
"type": "input",
"description": "Configuration select control input (LVTTL) that, with SEL0, EN0 and EN1, sets the crosspoint mode per the configuration select truth table."
},
{
"number": "7",
"name": "SEL0",
"type": "input",
"description": "Configuration select control input (LVTTL) that, with SEL1, EN0 and EN1, sets the crosspoint mode per the configuration select truth table."
},
{
"number": "8",
"name": "EN0",
"type": "input",
"description": "Channel 0 output enable input (LVTTL); together with EN1 and the SEL inputs it selects the mode per the truth table."
},
{
"number": "9",
"name": "IN0+",
"type": "input",
"description": "Non-inverting differential input, LVDS, Bus LVDS, CML or LVPECL compatible, with VCMR of 0.05 V to 3.55 V and VID of at least 100 mV."
},
{
"number": "10",
"name": "IN0-",
"type": "input",
"description": "Inverting differential input, LVDS, Bus LVDS, CML or LVPECL compatible, with VCMR of 0.05 V to 3.55 V and VID of at least 100 mV."
},
{
"number": "11",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "12",
"name": "VDDA",
"type": "power_in",
"description": "Supply pin, VDD = 3.3 V ±0.3 V (3.0 V to 3.6 V); at least 4 low-ESR 0.01 µF bypass capacitors should be connected from VDD to the GND plane."
},
{
"number": "13",
"name": "IN1+",
"type": "input",
"description": "Non-inverting differential input, LVDS, Bus LVDS, CML or LVPECL compatible, with VCMR of 0.05 V to 3.55 V and VID of at least 100 mV."
},
{
"number": "14",
"name": "IN1-",
"type": "input",
"description": "Inverting differential input, LVDS, Bus LVDS, CML or LVPECL compatible, with VCMR of 0.05 V to 3.55 V and VID of at least 100 mV."
},
{
"number": "15",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "16",
"name": "VDD2",
"type": "power_in",
"description": "Supply pin, VDD = 3.3 V ±0.3 V (3.0 V to 3.6 V); at least 4 low-ESR 0.01 µF bypass capacitors should be connected from VDD to the GND plane."
},
{
"number": "17",
"name": "EN1",
"type": "input",
"description": "Channel 1 output enable input (LVTTL); together with EN0 and the SEL inputs it selects the mode per the truth table."
},
{
"number": "18",
"name": "VDD1",
"type": "power_in",
"description": "Supply pin, VDD = 3.3 V ±0.3 V (3.0 V to 3.6 V); at least 4 low-ESR 0.01 µF bypass capacitors should be connected from VDD to the GND plane."
},
{
"number": "19",
"name": "TCK",
"type": "input",
"description": "Test clock input for IEEE 1149.1 (JTAG) support, LVTTL; maximum TCK clock frequency is 25.0 MHz."
},
{
"number": "20",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "21",
"name": "TMS",
"type": "input",
"description": "Test mode select input for IEEE 1149.1 (JTAG) support, LVTTL."
},
{
"number": "22",
"name": "TDI",
"type": "input",
"description": "Test data input for IEEE 1149.1 (JTAG) support, LVTTL; internal pull-down with IILR of -40 µA to -200 µA."
},
{
"number": "23",
"name": "TDO",
"type": "output",
"description": "Test data output for IEEE 1149.1 (JTAG) support, LVTTL; VOH at least 2.4 V at IOH = -12 mA and VOL at most 0.5 V at IOL = 12 mA at VDD = 3.0 V."
},
{
"number": "24",
"name": "TRST",
"type": "input",
"description": "Test reset input for IEEE 1149.1 (JTAG) support, LVTTL; minimum pulse width 2.5 ns (active low)."
},
{
"number": "25",
"name": "VDD2",
"type": "power_in",
"description": "Supply pin, VDD = 3.3 V ±0.3 V (3.0 V to 3.6 V); at least 4 low-ESR 0.01 µF bypass capacitors should be connected from VDD to the GND plane."
},
{
"number": "26",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "27",
"name": "OUT1-",
"type": "output",
"description": "Inverting switched LVDS differential output that can be connected to any one pair IN0± or IN1±; point-to-point use only, not multidrop BLVDS."
},
{
"number": "28",
"name": "OUT1+",
"type": "output",
"description": "Non-inverting switched LVDS differential output that can be connected to any one pair IN0± or IN1±; point-to-point use only, not multidrop BLVDS."
},
{
"number": "29",
"name": "VDDA",
"type": "power_in",
"description": "Supply pin, VDD = 3.3 V ±0.3 V (3.0 V to 3.6 V); at least 4 low-ESR 0.01 µF bypass capacitors should be connected from VDD to the GND plane."
},
{
"number": "30",
"name": "GND",
"type": "power_in",
"description": "Ground reference to LVDS and CMOS circuitry."
},
{
"number": "31",
"name": "OUT0-",
"type": "output",
"description": "Inverting switched LVDS differential output that can be connected to any one pair IN0± or IN1±; point-to-point use only, not multidrop BLVDS."
},
{
"number": "32",
"name": "OUT0+",
"type": "output",
"description": "Non-inverting switched LVDS differential output that can be connected to any one pair IN0± or IN1±; point-to-point use only, not multidrop BLVDS."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The LQFP pin numbers come from the LQFP column of the PIN DESCRIPTIONS table (page 2). Each pin numb; Naming conflict: the pin table and the absolute-maximum/recommended-conditions text call all supply ; Pins 8 and 28 are listed as N/C for the UQFN package only. The LQFP column and Figure 3 show a funct"
],
"pages_sent": 22,
"cost_usd": 0.1058,
"at": "2026-10-11T03:50:07"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/scan90cp02",
"pages": 22,
"sha256": "406fd9fb645aee09",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 32,
"described": 32,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "scan90cp02vy.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "scan90cp02vy-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
9,
9,
1.5
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "7542e7eb5b94ee9fe630b8f137802fef605740ab2450269210970c79f5cb467a",
"checked": "2026-10-11",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Texas Instruments",
"Package": "LQFP-32(7x7)",
"Category": "Logic",
"Pins": "32"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"scan90cp02vy"
],
"discovery_pitch": "SCAN90CP02VY (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"scan90cp02vy.kicad_sym",
"scan90cp02vy.kicad_mod",
"scan90cp02vy.glb",
"scan90cp02vy.step",
"scan90cp02vy.lbr",
"docs/hero.png",
"docs/scan90cp02vy-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"scan90cp02vy-hero.glb",
"scan90cp02vy-hero.overlay.json"
],
"visibility": {
"public": true
}
}