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Contents

README

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SC92F7545P32R

SOC Shenzhen SinOne Microelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

SC92F7545P32R from SOC Shenzhen SinOne Microelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P4.7 bidirectional General-purpose I/O P4.7 (GPIO), sink capability up to 50 mA for all I/O as stated in the general features.
2 P4.6 bidirectional General-purpose I/O P4.6 (GPIO), sink capability up to 50 mA for all I/O as stated in the general features.
3 VDD power_in Power supply pin; recommended operating voltage is 2.4 V to 5.5 V.
4 P4.5 bidirectional General-purpose I/O P4.5 (GPIO), sink capability up to 50 mA for all I/O as stated in the general features.
5 P4.4/CMPR bidirectional General-purpose I/O P4.4; alternate function CMPR is the external comparator reference voltage input for the analog comparator.
6 P4.3/INT13/PWM43/CMP3/AIN15 bidirectional General-purpose I/O P4.3; alternate functions are external interrupt 1 input 3 (INT13), PWM43 output, analog comparator input channel 3 (CMP3) and ADC input channel 15 (AIN15).
7 P4.2/INT12/PWM42/CMP2/AIN14 bidirectional General-purpose I/O P4.2; alternate functions are external interrupt 1 input 2 (INT12), PWM42 output, analog comparator input channel 2 (CMP2) and ADC input channel 14 (AIN14).
8 P4.1/INT11/PWM41/CMP1/AIN13 bidirectional General-purpose I/O P4.1; alternate functions are external interrupt 1 input 1 (INT11), PWM41 output, analog comparator input channel 1 (CMP1) and ADC input channel 13 (AIN13).
9 P1.0 bidirectional General-purpose I/O P1.0 (GPIO), sink capability up to 50 mA for all I/O as stated in the general features.
10 P1.1/MISO/RX1/tCK bidirectional General-purpose I/O P1.1; alternate functions are SPI master-in/slave-out (MISO), UART1 receive (RX1), and programming/emulation clock tCK, where tCK is a Schmitt-trigger input.
11 P1.2/SCK bidirectional General-purpose I/O P1.2; alternate function is the SPI and TWI serial clock SCK, a Schmitt-trigger input.
12 P1.3/MOSI/SDA/TX1/tDIO bidirectional General-purpose I/O P1.3; alternate functions are SPI master-out/slave-in (MOSI), TWI data (SDA), UART1 transmit (TX1), and programming/emulation data tDIO.
13 P1.4/INT14/AIN0 bidirectional General-purpose I/O P1.4; alternate functions are external interrupt 1 input 4 (INT14) and ADC input channel 0 (AIN0).
14 P1.5/INT15/AIN1 bidirectional General-purpose I/O P1.5; alternate functions are external interrupt 1 input 5 (INT15) and ADC input channel 1 (AIN1).
15 P1.6/INT16/AIN2 bidirectional General-purpose I/O P1.6; alternate functions are external interrupt 1 input 6 (INT16) and ADC input channel 2 (AIN2).
16 P1.7/INT17/AIN3 bidirectional General-purpose I/O P1.7; alternate functions are external interrupt 1 input 7 (INT17) and ADC input channel 3 (AIN3).
17 P2.0/INT20/AIN4 bidirectional General-purpose I/O P2.0; alternate functions are external interrupt 2 input 0 (INT20) and ADC input channel 4 (AIN4).
18 P2.1/INT21/AIN5 bidirectional General-purpose I/O P2.1; alternate functions are external interrupt 2 input 1 (INT21) and ADC input channel 5 (AIN5).
19 P2.2/INT22/AIN6 bidirectional General-purpose I/O P2.2; alternate functions are external interrupt 2 input 2 (INT22) and ADC input channel 6 (AIN6).
20 P2.3/INT23/AIN7 bidirectional General-purpose I/O P2.3; alternate functions are external interrupt 2 input 3 (INT23) and ADC input channel 7 (AIN7).
21 P2.4 bidirectional General-purpose I/O P2.4 (GPIO).
22 P2.5 bidirectional General-purpose I/O P2.5 (GPIO).
23 P2.6 bidirectional General-purpose I/O P2.6 (GPIO).
24 P2.7 bidirectional General-purpose I/O P2.7 (GPIO).
25 P0.1 bidirectional General-purpose I/O P0.1 (GPIO).
26 P0.2/T0/RX0 bidirectional General-purpose I/O P0.2; alternate functions are Timer0 external input (T0) and UART0 receive (RX0).
27 P0.3/T1/TX0 bidirectional General-purpose I/O P0.3; alternate functions are Timer1 external input (T1) and UART0 transmit (TX0).
28 P0.4/INT04/T2EX bidirectional General-purpose I/O P0.4; alternate functions are external interrupt 0 input 4 (INT04) and Timer2 external capture/reload input (T2EX).
29 P0.5/INT05/T2 bidirectional General-purpose I/O P0.5; alternate functions are external interrupt 0 input 5 (INT05) and Timer2 external counter input (T2), which can also be the programmable clock output in Timer2 mode 3.
30 P0.6/INT06 bidirectional General-purpose I/O P0.6; alternate function is external interrupt 0 input 6 (INT06).
31 P0.7/INT07 bidirectional General-purpose I/O P0.7; alternate function is external interrupt 0 input 7 (INT07).
32 VSS power_in Ground pin (GND).

Key specifications

Parameter Value
Manufacturer SOC Shenzhen SinOne Microelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC supply voltage (absolute maximum) VDD/VSS -0.3 5.5 V 73
Voltage on any pin (absolute maximum) -0.3 V Upper limit printed as VDD+0.3 73
Operating ambient temperature (absolute maximum) TA -40 85 ℃ 73
Storage temperature (absolute maximum) TSTG -55 125 ℃ 73
Operating voltage (recommended) VDD 2.4 5.5 V 73
Operating ambient temperature (recommended) TA -40 85 ℃ 73
Operating current Iop1 9.5 11 mA VDD=5V, TA=25℃; IRC=16MHz 73
Operating current Iop2 6.5 8 mA VDD=5V, TA=25℃; IRC=8MHz 73
Operating current Iop3 5.2 6.5 mA VDD=5V, TA=25℃; IRC=4MHz 73
Operating current Iop4 4.3 5.1 mA VDD=5V, TA=25℃; IRC=1.33MHz 73
Standby current (Power Down mode) Ipd1 0.7 1 μA VDD=5V, TA=25℃; Power Down mode 73
Standby current (IDLE mode) IIDL1 7 8 mA VDD=5V, TA=25℃; IDLE mode 73
Low-frequency 128k RC oscillator current ILRC 6 10 μA VDD=5V, TA=25℃ 73
WDT current IWDT 1 3 μA VDD=5V, TA=25℃ 73
Input low voltage VIL1 -0.3 V VDD=5V, TA=25℃; upper limit printed as 0.3VDD 73
Input low voltage (Schmitt trigger) VIL2 -0.2 V Schmitt trigger input: tCK, SCK; upper limit printed as 0.2VDD 73
Output low current IOL1 27 mA VDD=5V, TA=25℃; VPin=0.4V 73
Output low current IOL2 50 mA VDD=5V, TA=25℃; VPin=0.8V 73
Output high current, P4 IOH1 17 mA VDD=5V, TA=25℃; VPin=4.3V 73
Output high current, P4 IOH2 8 mA VDD=5V, TA=25℃; VPin=4.7V 73
Output high current, P0-P2, IOH level 0 IOH3 17 mA VDD=5V, TA=25℃; VPin=4.3V, Pxyz=0 73
Output high current, P0-P2, IOH level 1 13 mA VDD=5V, TA=25℃; VPin=4.3V, Pxyz=1 73
Output high current, P0-P2, IOH level 2 10 mA VDD=5V, TA=25℃; VPin=4.3V, Pxyz=2 73
Output high current, P0-P2, IOH level 3 5 mA VDD=5V, TA=25℃; VPin=4.3V, Pxyz=3 73
Output high current, P0-P2, IOH level 0 (VPin=4.7V) IOH4 8 mA VDD=5V, TA=25℃; VPin=4.7V, Pxyz=0 74
Output high current, P0-P2, IOH level 1 (VPin=4.7V) 6 mA VDD=5V, TA=25℃; VPin=4.7V, Pxyz=1 74
Output high current, P0-P2, IOH level 2 (VPin=4.7V) 4 mA VDD=5V, TA=25℃; VPin=4.7V, Pxyz=2 74
Output high current, P0-P2, IOH level 3 (VPin=4.7V) 2 mA VDD=5V, TA=25℃; VPin=4.7V, Pxyz=3 74
Internal 2.4V reference voltage output VDD24 2.37 2.4 2.45 V TA=-40~85℃ 74
Operating current Iop5 6.5 8 mA VDD=3.3V, TA=25℃; IRC=16MHz 74
Operating current Iop6 5 6 mA VDD=3.3V, TA=25℃; IRC=8MHz 74
Operating current Iop7 4 5 mA VDD=3.3V, TA=25℃; IRC=4MHz 74
Operating current Iop8 3.3 4 mA VDD=3.3V, TA=25℃; IRC=1.33MHz 74
Standby current (Power Down mode) Ipd2 0.6 1 uA VDD=3.3V, TA=25℃; Power Down mode 74
Standby current (IDLE mode) IIDL2 5 6 mA VDD=3.3V, TA=25℃; IDLE mode 74
Input low voltage (Schmitt trigger, RSTN) VIL,RSTN -0.2 V VDD=3.3V, TA=25℃; Schmitt trigger input: tCK, SCK; upper limit printed as 0.2VDD 74
Input low voltage VIL -0.3 V VDD=3.3V, TA=25℃; upper limit printed as 0.3VDD 74
Output low current IOL3 25 mA VDD=3.3V, TA=25℃; VPin=0.4V 74
Output low current IOL4 40 mA VDD=3.3V, TA=25℃; VPin=0.8V 74
Output high current IOH5 5 mA VDD=3.3V, TA=25℃; Vpin=3.0V 74
Power On Reset time TPOR 5 10 ms VDD = 2.4V ~ 5.5V, TA = 25℃ 74
Power Down mode wake-up time TPDW 1 1.5 ms VDD = 2.4V ~ 5.5V, TA = 25℃ 74
Reset pulse width Treset 18 μs Active low (低电平有效); VDD = 2.4V ~ 5.5V, TA = 25℃ 74
RC oscillator frequency stability fosc 15.84 16 16.16 MHz VDD=4.55.5V, TA=-2085℃ 74
ADC supply voltage VAD 2.4 5 5.5 V TA = 25℃ 74
ADC input resistance RAIN 1 M VIN=5V, TA = 25℃ 75
ADC conversion current 1 IADC1 1 2 mA VDD=5V; ADC module on 75
Differential nonlinearity error (DNL) DNL -1 1 LSB VDD=5V, VREF=5V 75
Integral nonlinearity error (INL) INL -2 2 LSB TA = 25℃ 75
Offset error EZ 1 LSB TA = 25℃ 75
Full-scale error EF 35 LSB TA = 25℃ 75
Total absolute error EAD 35 LSB TA = 25℃ 75
ADC conversion time 1 TADC1 1 7.5 μs TA = 25℃; ADC Clock = 2.67MHz; ADC sampling period = 6 75
ADC conversion time 2 TADC2 15 μs TA = 25℃; ADC Clock = 1.33MHz; ADC sampling period = 6 75
Comparator input voltage range (lower limit) VCM 0 V VDD=5V, TA=25℃; upper limit printed as VDD 75
Comparator offset voltage VOS 10 30 mV VDD=5V, TA=25℃ 75
Comparator conversion current ICMP 100 μA VDD=5V, TA=25℃ 75
Comparator response time TCMP 2 μs VDD=5V, TA=25℃ 75

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PBT BTM Base timer BTMIF EBTM IPBTM 004BH 10 9 H/W Auto 能 28

CAD (KiCad official)

  • Symbol: SC92F7545P32R
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: sc92f7545p32r-etched.step / sc92f7545p32r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sc92f7545p32r.step / sc92f7545p32r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: SOC Shenzhen SinOne Microelectronics datasheet (79 pp, sha256 59312f7d90349961, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF