SC18IS606PWJ from NXP Semicon, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SDA	bidirectional	I2C-bus data line, operating at up to 400 kHz as a target.
2	SCL	input	I2C-bus clock input, supporting clock rates up to 400 kHz.
3	INT	output	Active LOW interrupt output; this open-drain pin must be pulled HIGH with a resistor and must not be held LOW at power on or reset.
4	RESET	input	Reset input, active LOW.
5	A2	input	Address input 2, which sets the programmable bit A2 of the I2C-bus target address.
6	A1	input	Address input 1, which sets the programmable bit A1 of the I2C-bus target address.
7	A0	input	Address input 0, which sets the programmable bit A0 of the I2C-bus target address.
8	SS2/GPIO2	bidirectional	SPI slave select output 2 (active LOW), or GPIO 2 when not used as an SPI chip select.
9	SS0/GPIO0	bidirectional	SPI slave select output 0 (active LOW), or GPIO 0 when not used as an SPI chip select.
10	MOSI	output	Master Out, Slave In: SPI data output from the SC18IS606 master to the slave device.
11	SPICLK	output	SPI clock output generated by the SC18IS606 to clock data on MOSI and MISO, operating up to 1.8 Mbit/s.
12	VDD	power_in	Supply voltage, 1.71 V to 3.6 V.
13	VSS	power_in	Ground supply.
14	MISO	input	Master In, Slave Out: SPI data input to the SC18IS606 master from the slave device.
15	VREFP	power_in	Must be connected to VDD.
16	SS1/GPIO1	bidirectional	SPI slave select output 1 (active LOW), or GPIO 1 when not used as an SPI chip select.

Key specifications

Parameter	Value
Manufacturer	NXP Semicon
Package	TSSOP-16
Category	Communication Interface Chip/UART/485/232
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
supply voltage	VDD	-0.5		4.6	V		12
bias ambient temperature	Tamb(bias)	-55		150	°C	operating	12
storage temperature	Tstg	-65		150	°C		12
input voltage	VI	-0.5		5.4	V	5 V tolerant I/O pins; VDD ≥ 1.71 V	12
input voltage	VI	-0.5		3.6	V	3 V tolerant I/O - all pins	12
HIGH-level output current per input/output pin	IOH(I/O)			8	mA		12
LOW-level output current per input/output pin	IOL(I/O)			20	mA		12
maximum total I/O current	II/O(tot)(max)			120	mA		12
total power dissipation per package	Ptot/pack			1.5	W		12
supply voltage	VDD	1.71		3.6	V		13
ambient operating temperature	Tamb	-40		105	°C		13
operating supply current	IDD(oper)		2.1	4	mA	VDD = 3.3 V	13
Idle mode supply current	IDD(idle)		1.3	3.4	mA	VDD = 3.3 V	13
total Power-down mode supply current	IDD(tpd)		6	75	µA	VDD = 3.3 V	13
LOW-level output voltage	VOL			0.5	V	IOL = 4 mA; 2.5 V ≤ VDD ≤ 3.6 V	13
input capacitance at gate	Cig			15	pF		13
LOW-level input current	IIL			-80	µA	logical 0; VI = 0.4 V	13
input leakage current	ILI	-10		10	µA	all ports; VI = VIL or VIH	13
HIGH-LOW transition current	ITHL	-30		-450	µA	all ports; logical 1-to-0; VI = 2.0 V at VDD = 3.6 V	13
pull-up current	Ipu	10	50	90	µA	2.0 V ≤ VDD ≤ 3.6 V	13
pull-up current	Ipu	7	50	85	µA	1.71 V ≤ VDD ≤ 2.0 V	13
pull-up current	Ipu	0	0	0	µA	VDD < VI < 5 V	13
glitch rejection time	tgr			20	ns	RESET pin	14
signal acceptance time	tsa	125			ns	RESET pin	14
signal acceptance time	tsa	50			ns	any pin except RESET	14
SPI operating frequency	fSPI			1.875	MHz		14
SPI cycle time	TSPICYC	533			ns	1.875 MHz	14
data set-up time	tDS	10			ns		14
data hold time	tDH	7			ns		14
data output valid time	tV(Q)			2	ns		14

CAD (KiCad official)

Symbol: SC18IS606PWJ
Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
3D model: TSSOP-16 (KiCad packages3D, STEP)
3D model files: sc18is606pwj-etched.step / sc18is606pwj-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sc18is606pwj.step / sc18is606pwj.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: NXP Semicon datasheet (27 pp, sha256 f597e58a481bf76a, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

SC18IS606PWJ

Verified SC18IS606PWJ

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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