component
SC0163D-TL
Public Made by Adomby adom
POWER INTEGRATIONS Battery Management ICs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SC0163D-TL
POWER INTEGRATIONS · Battery Management ICs · SO-8
SC0163D-TL from POWER INTEGRATIONS, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not internally connected; the datasheet requires this pin to be connected to the BYPASS pin on the PCB. |
| 2 | NC | unconnected | Not internally connected; the datasheet requires this pin to be connected to the GROUND pin on the PCB. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | FBD | output | Feedback loop drive output connected to the reference input of the external power supply error amplifier to set the output voltage, sourced and sunk via IT(UP) and IT(DO) with 2 mA current steps. |
| 5 | D- | input | USB D- data line input; switch N2 connects a 19.53 kΩ pull-down (14.25 kΩ to 24.5 kΩ range) to this line after Quick Charge handshake completes. |
| 6 | D+ | input | USB D+ data line input; leakage resistance is 300 kΩ to 1.5 MΩ when switch N1 is off, and the line is pulled down below 0.325 V to enter default 5 V mode. |
| 7 | R | passive | Connected to the internal band-gap reference and provides reference current through an external resistor, recommended RREF = 38.3 kΩ ±1%. |
| 8 | BP | power_out | Bypass capacitor connection for the internally generated supply; the internal shunt clamps this pin at 5.7 V to 6.3 V when powered through an external resistor, with recommended CBP = 470 nF. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | POWER INTEGRATIONS |
| Package | SO-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| BYPASS Pin Voltage | VBP | 3.1 | 4.3 | 6.3 | V | TJ = +25 °C | 5 |
| BYPASS Pin Shunt Voltage | VBP(SHUNT) | 5.7 | 6 | 6.3 | V | IBP = 8 mA | 5 |
| Data Detect Voltage | VDAT(REF) | 0.25 | 0.325 | 0.4 | V | 5 | |
| Output Voltage Selection Reference | VSEL(REF) | 1.8 | 2 | 2.2 | V | 5 | |
| D+ High Glitch Filter Time | TGLITCH(BC)DONE | 1000 | 1500 | ms | 5 | ||
| Output Voltage Glitch Filter Time | TGLITCH(V)CHANGE | 20 | 40 | 60 | ms | 5 | |
| Data Lines Short-Circuit Delay | TDAT(SHORT) | 10 | 20 | ms | VOUT ≥ 0.8 V | 5 | |
| D+ Leakage Resistance | RDAT(LKG) | 300 | 900 | 1500 | kΩ | VBP = 3.1-6.3 V, VD+ = 0.5-3.6 V; Switch N1 is Off | 5 |
| D- Pull-Down Resistance | RDM(DWN) | 14.25 | 19.53 | 24.5 | kΩ | 5 | |
| Switch N1 On-Resistance | RDS(ON)N1 | 20 | 40 | Ω | VBP = 4.3 V, VD+ ≤ 3.6 V, IDRAIN = 200 mA | 5 | |
| Power-Up Reset Threshold Voltage | VBP(RESET) | 2.7 | V | 5 | |||
| BYPASS Pin Source Current | IBPSC | 200 | µA | VBP = 4.3 V, RREF = 38.3 kW, TJ = 25 °C | 5 | ||
| REFERENCE Pin Voltage | VR | 0.383 | V | RREF = 38.3 kW | 5 | ||
| D- Low Glitch Filter Time | TGLITCH(DM)LOW | 1 | ms | 5 | |||
| Continuous Mode Glitch Filter Time | TGLITCH(CONT)CHANGE | 150 | µs | 5 | |||
| Continuous Mode Output Change Time | TV(CONT)CHANGE | 2 | ms | SINGLE | 5 | ||
| Data Line Capacitance | CDCP(PWR) | 1 | nF | See Note A | 5 | ||
| Toggle Up Current Source Step | ∆IT(UP) | 2 | mA | 5 | |||
| Toggle Down Current Source Step | ∆IT(DO) | 2 | mA | 5 | |||
| BYPASS Pin Voltage | -0.3 | 9 | V | 5 | |||
| REFERENCE Pin Voltage | -0.3 | 9 | V | 5 | |||
| FBD Pin Voltage | -0.3 | 9 | V | 5 | |||
| D+/D- Pin Voltage | -0.3 | 5 | V | 5 | |||
| BYPASS Pin Current | 25 | mA | 5 | ||||
| D+/D- Pin Current | 1 | mA | Per USB BC 1.2 and HVDCP specifications (note 1) | 5 | |||
| Operating Junction Temperature | -40 | 150 | °C | 5 | |||
| Operating Ambient Temperature | -40 | 105 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 |
CAD (KiCad official)
- Symbol:
SC0163D-TL - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
sc0163d-tl-etched.step/sc0163d-tl-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sc0163d-tl.step/sc0163d-tl.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: POWER INTEGRATIONS datasheet (8 pp, sha256
0abc5f498e6da689, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SC0163D-TL
**POWER INTEGRATIONS** · Battery Management ICs · SO-8
SC0163D-TL from POWER INTEGRATIONS, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | Not internally connected; the datasheet requires this pin to be connected to the BYPASS pin on the PCB. |
| 2 | NC | unconnected | Not internally connected; the datasheet requires this pin to be connected to the GROUND pin on the PCB. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | FBD | output | Feedback loop drive output connected to the reference input of the external power supply error amplifier to set the output voltage, sourced and sunk via IT(UP) and IT(DO) with 2 mA current steps. |
| 5 | D- | input | USB D- data line input; switch N2 connects a 19.53 kΩ pull-down (14.25 kΩ to 24.5 kΩ range) to this line after Quick Charge handshake completes. |
| 6 | D+ | input | USB D+ data line input; leakage resistance is 300 kΩ to 1.5 MΩ when switch N1 is off, and the line is pulled down below 0.325 V to enter default 5 V mode. |
| 7 | R | passive | Connected to the internal band-gap reference and provides reference current through an external resistor, recommended RREF = 38.3 kΩ ±1%. |
| 8 | BP | power_out | Bypass capacitor connection for the internally generated supply; the internal shunt clamps this pin at 5.7 V to 6.3 V when powered through an external resistor, with recommended CBP = 470 nF. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | POWER INTEGRATIONS |
| Package | SO-8 |
| Category | Power Management ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| BYPASS Pin Voltage | VBP | 3.1 | 4.3 | 6.3 | V | TJ = +25 °C | 5 |
| BYPASS Pin Shunt Voltage | VBP(SHUNT) | 5.7 | 6 | 6.3 | V | IBP = 8 mA | 5 |
| Data Detect Voltage | VDAT(REF) | 0.25 | 0.325 | 0.4 | V | | 5 |
| Output Voltage Selection Reference | VSEL(REF) | 1.8 | 2 | 2.2 | V | | 5 |
| D+ High Glitch Filter Time | TGLITCH(BC)DONE | 1000 | | 1500 | ms | | 5 |
| Output Voltage Glitch Filter Time | TGLITCH(V)CHANGE | 20 | 40 | 60 | ms | | 5 |
| Data Lines Short-Circuit Delay | TDAT(SHORT) | 10 | | 20 | ms | VOUT ≥ 0.8 V | 5 |
| D+ Leakage Resistance | RDAT(LKG) | 300 | 900 | 1500 | kΩ | VBP = 3.1-6.3 V, VD+ = 0.5-3.6 V; Switch N1 is Off | 5 |
| D- Pull-Down Resistance | RDM(DWN) | 14.25 | 19.53 | 24.5 | kΩ | | 5 |
| Switch N1 On-Resistance | RDS(ON)N1 | 20 | | 40 | Ω | VBP = 4.3 V, VD+ ≤ 3.6 V, IDRAIN = 200 mA | 5 |
| Power-Up Reset Threshold Voltage | VBP(RESET) | | 2.7 | | V | | 5 |
| BYPASS Pin Source Current | IBPSC | | 200 | | µA | VBP = 4.3 V, RREF = 38.3 kW, TJ = 25 °C | 5 |
| REFERENCE Pin Voltage | VR | | 0.383 | | V | RREF = 38.3 kW | 5 |
| D- Low Glitch Filter Time | TGLITCH(DM)LOW | | 1 | | ms | | 5 |
| Continuous Mode Glitch Filter Time | TGLITCH(CONT)CHANGE | | 150 | | µs | | 5 |
| Continuous Mode Output Change Time | TV(CONT)CHANGE | | 2 | | ms | SINGLE | 5 |
| Data Line Capacitance | CDCP(PWR) | | 1 | | nF | See Note A | 5 |
| Toggle Up Current Source Step | ∆IT(UP) | | 2 | | mA | | 5 |
| Toggle Down Current Source Step | ∆IT(DO) | | 2 | | mA | | 5 |
| BYPASS Pin Voltage | | -0.3 | | 9 | V | | 5 |
| REFERENCE Pin Voltage | | -0.3 | | 9 | V | | 5 |
| FBD Pin Voltage | | -0.3 | | 9 | V | | 5 |
| D+/D- Pin Voltage | | -0.3 | | 5 | V | | 5 |
| BYPASS Pin Current | | | | 25 | mA | | 5 |
| D+/D- Pin Current | | | | 1 | mA | Per USB BC 1.2 and HVDCP specifications (note 1) | 5 |
| Operating Junction Temperature | | -40 | | 150 | °C | | 5 |
| Operating Ambient Temperature | | -40 | | 105 | °C | | 5 |
| Storage Temperature | | -65 | | 150 | °C | | 5 |
## CAD (KiCad official)
- Symbol: `SC0163D-TL`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `sc0163d-tl-etched.step` / `sc0163d-tl-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sc0163d-tl.step` / `sc0163d-tl.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [POWER INTEGRATIONS datasheet](docs/sc0163d-tl-datasheet.pdf) (8 pp, sha256 `0abc5f498e6da689`, retrieved 2026-10-28, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sc0163d-tl-datasheet.pdf)