# SBLC05CI

**Shikues** · ESD And Surge Protection (TVS/ESD) · SOD-323

SBLC05CI from Shikues, in a SOD-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I/O 1 | passive | Bidirectional TVS terminal 1 (non-polarized) connected to the protected I/O line, with VRWM 5.0V, VB min 6.0V at 1mA and CT max 18pF for SBLC05CI. |
| 2 | I/O 2 | passive | Bidirectional TVS terminal 2 (non-polarized) connected to the other side of the protected line or to ground, with VRWM 5.0V and IR max 1µA for SBLC05CI. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shikues |
| Package | SOD-323 |
| Category | Circuit Protection |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse working voltage (VRWM) for SBLC05CI | VRWM |  |  | 5 | V |  | 2 |
| Breakdown voltage at 1 mA | VB@1mA | 6 |  |  | V | @1mA | 2 |
| Clamping voltage at 1 A | VC@1A |  |  | 9.8 | V | @1A | 2 |
| Clamping voltage at Ipp (first VC@Ipp column) | VC@Ipp |  |  | 18.3 | V |  | 2 |
| Diode capacitance | CT |  |  | 18 | pF |  | 2 |
| ESD per IEC 61000-4-2 (Air) | VESD | -30 |  | 30 | kV | ESD per IEC 61000-4-2 (Air) | 2 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -30 |  | 30 | kV | ESD per IEC 61000-4-2 (Contact) | 2 |
| Peak pulse power | PPP |  |  | 350 | W | 8/20 µs waveshape | 1 |
| Operating temperature | TOPT | -55 |  | 150 | °C |  | 2 |
| Storage temperature | TSTG | -55 |  | 150 | °C |  | 2 |
| Lead soldering temperature | TL |  |  | 260 | °C |  | 2 |

## CAD (KiCad official)

- Symbol: `SBLC05CI`
- Footprint: `Diode_SMD:D_SOD-323`
- 3D model: SOD-323 (KiCad packages3D, STEP)
- 3D model files: `sblc05ci-etched.step` / `sblc05ci-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sblc05ci.step` / `sblc05ci.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shikues datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757070906764345344) (4 pp, sha256 `de4210b0b7139f88`, retrieved 2026-10-24, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sblc05ci-datasheet.pdf)