# SA2B-E3

**Vishay Intertech** · Diodes - General Purpose · DO-214AC(SMA)

SA2B-E3 from Vishay Intertech, in a DO-214AC(SMA). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | DO-214AC(SMA) |
| Category | Diodes |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Instantaneous forward voltage, TJ = 25 °C | VF |  | 0.954 | 1.1 | V | IF = 2.0 A, TJ = 25 °C | 1 |
| Instantaneous forward voltage, TJ = 125 °C | VF |  | 0.854 | 0.95 | V | IF = 2.0 A, TJ = 125 °C | 1 |
| Reverse current, TJ = 25 °C | IR |  | 0.19 | 3 | μA | Rated VR, TJ = 25 °C | 1 |
| Reverse current, TJ = 125 °C | IR |  | 28 | 90 | μA | Rated VR, TJ = 125 °C | 1 |
| Max. repetitive peak reverse voltage | VRRM |  |  | 100 | V |  | 1 |
| Average forward current | IF(AV) |  |  | 2 | A |  | 1 |
| Peak forward surge current | IFSM |  |  | 55 | A | 10 ms single half sine-wave superimposed on rated load | 1 |
| Operating junction and storage temperature range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Typical thermal resistance, junction-to-ambient | RθJA |  | 80 |  | °C/W | PCB mounted on 0.79" x 0.79" (20 mm x 20 mm) copper pad areas | 2 |
| Typical thermal resistance, junction-to-lead | RθJL |  | 12 |  | °C/W | PCB mounted on 0.79" x 0.79" (20 mm x 20 mm) copper pad areas | 2 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |

## CAD (KiCad official)

- Symbol: `SA2B-E3`
- Footprint: `Diode_SMD:D_SMA`
- 3D model: DO-214AC(SMA) (KiCad packages3D, STEP)
- 3D model files: `sa2b-e3-etched.step` / `sa2b-e3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sa2b-e3.step` / `sa2b-e3.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Vishay Intertech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590938562798313472) (4 pp, sha256 `7df6bbd22077d67a`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `cathode-band convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sa2b-e3-datasheet.pdf)