# S8N10

**HL** · MOSFETs · SOT-89-3L

S8N10 from HL, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate terminal; Gate-Source voltage rating is ±20 V. |
| 2 | D | passive | Drain terminal, also connected to the exposed tab; Drain-Source voltage rating is 100 V and continuous drain current is 6.5 A at TA=25 °C with VGS=10 V. |
| 3 | S | passive | Source terminal of the N-channel MOSFET. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | SOT-89-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `S8N10`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files: `s8n10-etched.step` / `s8n10-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `s8n10.step` / `s8n10.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HL datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602879051480506368) (5 pp, sha256 `f744b23ce17d2a54`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/s8n10-datasheet.pdf)