component
S4025LTP
Public Made by Adomby adom
Littelfuse Thyristors (SCR)/Modules, TO-220AB. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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S4025LTP
Littelfuse · Thyristors (SCR)/Modules · TO-220AB
S4025LTP from Littelfuse, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CATHODE | passive | SCR cathode main terminal, labeled CATHODE on the TO-220AB L-Package drawing (the device is rated for IT(RMS) 20 A or 25 A depending on the part). |
| 2 | ANODE | passive | SCR anode main terminal, labeled ANODE on the TO-220AB L-Package drawing; the isolated mounting tab is limited to a maximum torque of 8 in-lbs (0.904 Nm). |
| 3 | GATE | input | Gate trigger terminal, labeled GATE on the drawing; the 25 A device specifies IGT 35 mA max, VGT 1.5 V max at VD = 12 V, and peak gate current IGM 3.5 A at TJ = 125°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Littelfuse |
| Package | TO-220AB |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak repetitive off-state / reverse voltage (400V variant, part-number code 40) | VDRM/VRRM | 400 | V | Part-numbering table: 40 = 400V | 9 | ||
| Gate trigger current | IGT | 1 | 35 | mA | VD = 12V, RL = 30 Ω; Sxx25x column | 2 | |
| Gate trigger voltage | VGT | 1.5 | V | VD = 12V, RL = 30 Ω | 2 | ||
| Critical rate of rise of off-state voltage, TJ = 100°C, 400V | dv/dt | 450 | V/μs | VD = VDRM; gate open; TJ = 100°C; 400V | 2 | ||
| Critical rate of rise of off-state voltage, TJ = 125°C, 400V | dv/dt | 350 | V/μs | VD = VDRM; gate open; TJ = 125°C; 400V | 2 | ||
| Gate non-trigger voltage | VGD | 0.2 | V | VD = VDRM, RL = 3.3 kΩ, TJ = 125°C | 2 | ||
| Holding current | IH | 50 | mA | IT = 400mA (initial); Sxx25x column | 2 | ||
| Turn-off time | tq | 35 | μs | (1) IT=2A; tp=50μs; dv/dt=5V/μs; di/dt=-30A/μs | 2 | ||
| On-state voltage (25A device) | VTM | 1.6 | V | 25A Device: IT = 50A; tp = 380μs | 3 | ||
| Peak off-state / reverse blocking current, TJ = 25°C, 400-600V | IDRM / IRRM | 10 | μA | TJ = 25°C; VDRM/VRRM 400-600V | 3 | ||
| Peak off-state / reverse blocking current, TJ = 100°C, 400-600V | IDRM / IRRM | 500 | μA | TJ = 100°C; VDRM/VRRM 400-600V | 3 | ||
| Peak off-state / reverse blocking current, TJ = 125°C, 400-600V | IDRM / IRRM | 1000 | μA | TJ = 125°C; VDRM/VRRM 400-600V | 3 | ||
| RMS on-state current | IT(RMS) | 25 | A | Sxx25L: TC = 75°C | 2 | ||
| Average on-state current | IT(AV) | 16 | A | Sxx25L: TC = 75°C | 2 | ||
| Peak non-repetitive surge current, 50 Hz | ITSM | 300 | A | single half cycle; f = 50Hz; TJ (initial) = 25°C | 2 | ||
| Peak non-repetitive surge current, 60 Hz | ITSM | 350 | A | single half cycle; f = 60Hz; TJ (initial) = 25°C | 2 | ||
| I2t value for fusing | I2t | 510 | A2s | tp = 8.3 ms | 2 | ||
| Critical rate of rise of on-state current | di/dt | 150 | A/μs | f = 60Hz; TJ = 125°C | 2 | ||
| Peak gate current | IGM | 3.5 | A | TJ = 125°C | 2 | ||
| Average gate power dissipation | PG(AV) | 0.8 | W | TJ = 125°C | 2 | ||
| Storage temperature range | Tstg | -40 | 150 | °C | 2 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 2 | ||
| Thermal resistance, junction to case (AC) | Rθ(J-C) | 2.4 | °C/W | Sxx20L/Sxx25L (L package) | 3 | ||
| Thermal resistance, junction to ambient | Rθ(J-A) | 50 | °C/W | Sxx20L/Sxx25L | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Lead Bend MIL-STD-750, M-2036 Cond E Terminal Finish 100% Matte Tin-plated | 6 |
CAD (KiCad official)
- Symbol:
S4025LTP - Footprint:
Package_TO_SOT_THT:TO-220-3_Vertical - 3D model: TO-220AB (KiCad packages3D, STEP)
- 3D model files:
s4025ltp-etched.step/s4025ltp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s4025ltp.step/s4025ltp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Littelfuse datasheet (9 pp, sha256
97a418a8c58d2bc0, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# S4025LTP
**Littelfuse** · Thyristors (SCR)/Modules · TO-220AB
S4025LTP from Littelfuse, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CATHODE | passive | SCR cathode main terminal, labeled CATHODE on the TO-220AB L-Package drawing (the device is rated for IT(RMS) 20 A or 25 A depending on the part). |
| 2 | ANODE | passive | SCR anode main terminal, labeled ANODE on the TO-220AB L-Package drawing; the isolated mounting tab is limited to a maximum torque of 8 in-lbs (0.904 Nm). |
| 3 | GATE | input | Gate trigger terminal, labeled GATE on the drawing; the 25 A device specifies IGT 35 mA max, VGT 1.5 V max at VD = 12 V, and peak gate current IGM 3.5 A at TJ = 125°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Littelfuse |
| Package | TO-220AB |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak repetitive off-state / reverse voltage (400V variant, part-number code 40) | VDRM/VRRM | | | 400 | V | Part-numbering table: 40 = 400V | 9 |
| Gate trigger current | IGT | 1 | | 35 | mA | VD = 12V, RL = 30 Ω; Sxx25x column | 2 |
| Gate trigger voltage | VGT | | | 1.5 | V | VD = 12V, RL = 30 Ω | 2 |
| Critical rate of rise of off-state voltage, TJ = 100°C, 400V | dv/dt | 450 | | | V/μs | VD = VDRM; gate open; TJ = 100°C; 400V | 2 |
| Critical rate of rise of off-state voltage, TJ = 125°C, 400V | dv/dt | 350 | | | V/μs | VD = VDRM; gate open; TJ = 125°C; 400V | 2 |
| Gate non-trigger voltage | VGD | 0.2 | | | V | VD = VDRM, RL = 3.3 kΩ, TJ = 125°C | 2 |
| Holding current | IH | | | 50 | mA | IT = 400mA (initial); Sxx25x column | 2 |
| Turn-off time | tq | | | 35 | μs | (1) IT=2A; tp=50μs; dv/dt=5V/μs; di/dt=-30A/μs | 2 |
| On-state voltage (25A device) | VTM | | | 1.6 | V | 25A Device: IT = 50A; tp = 380μs | 3 |
| Peak off-state / reverse blocking current, TJ = 25°C, 400-600V | IDRM / IRRM | | | 10 | μA | TJ = 25°C; VDRM/VRRM 400-600V | 3 |
| Peak off-state / reverse blocking current, TJ = 100°C, 400-600V | IDRM / IRRM | | | 500 | μA | TJ = 100°C; VDRM/VRRM 400-600V | 3 |
| Peak off-state / reverse blocking current, TJ = 125°C, 400-600V | IDRM / IRRM | | | 1000 | μA | TJ = 125°C; VDRM/VRRM 400-600V | 3 |
| RMS on-state current | IT(RMS) | | | 25 | A | Sxx25L: TC = 75°C | 2 |
| Average on-state current | IT(AV) | | | 16 | A | Sxx25L: TC = 75°C | 2 |
| Peak non-repetitive surge current, 50 Hz | ITSM | | | 300 | A | single half cycle; f = 50Hz; TJ (initial) = 25°C | 2 |
| Peak non-repetitive surge current, 60 Hz | ITSM | | | 350 | A | single half cycle; f = 60Hz; TJ (initial) = 25°C | 2 |
| I2t value for fusing | I2t | | | 510 | A2s | tp = 8.3 ms | 2 |
| Critical rate of rise of on-state current | di/dt | | | 150 | A/μs | f = 60Hz; TJ = 125°C | 2 |
| Peak gate current | IGM | | | 3.5 | A | TJ = 125°C | 2 |
| Average gate power dissipation | PG(AV) | | | 0.8 | W | TJ = 125°C | 2 |
| Storage temperature range | Tstg | -40 | | 150 | °C | | 2 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 2 |
| Thermal resistance, junction to case (AC) | Rθ(J-C) | | | 2.4 | °C/W | Sxx20L/Sxx25L (L package) | 3 |
| Thermal resistance, junction to ambient | Rθ(J-A) | | | 50 | °C/W | Sxx20L/Sxx25L | 3 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Lead Bend MIL-STD-750, M-2036 Cond E Terminal Finish 100% Matte Tin-plated | 6 |
## CAD (KiCad official)
- Symbol: `S4025LTP`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220AB (KiCad packages3D, STEP)
- 3D model files: `s4025ltp-etched.step` / `s4025ltp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `s4025ltp.step` / `s4025ltp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Littelfuse datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904990020157440) (9 pp, sha256 `97a418a8c58d2bc0`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/s4025ltp-datasheet.pdf)