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S25FL256SAGNFI000
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Infineon Cypress Semicon NOR FLASH, WSON-8-EP(6x8). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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S25FL256SAGNFI000
Infineon Cypress Semicon · NOR FLASH · WSON-8-EP(6x8)
S25FL256SAGNFI000 from Infineon Cypress Semicon, in a WSON-8-EP(6x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip select input from the host; the detailed CS# requirements are in Section 2.5, which is not in the provided pages, so only the function implied by the name is stated here. |
| 2 | SO/IO1 | bidirectional | Serial data output in standard SPI mode and IO1 in Dual/Quad modes; the detailed signal description is in Section 2.7, which is not in the provided pages. |
| 3 | WP#/IO2 | bidirectional | Write Protect input in standard SPI mode and IO2 in Quad mode; the detailed signal description is in Section 2.8, which is not in the provided pages. |
| 4 | VSS | power_in | Common voltage drain and ground reference for the device core, input signal receivers, and output drivers (Section 2.12). |
| 5 | SI/IO0 | bidirectional | Serial data input in standard SPI mode and IO0 in Dual/Quad modes; the detailed signal description is in Section 2.6, which is not in the provided pages. |
| 6 | SCK | input | Serial clock input; the detailed SCK requirements are in Section 2.4, which is not in the provided pages, so only the function implied by the name is stated here. |
| 7 | HOLD#/IO3 | bidirectional | Hold input in standard SPI mode and IO3 in Quad mode; the detailed signal description is in Section 2.9, which is not in the provided pages. |
| 8 | VCC | power_in | Core voltage supply for all internal logic and all internal functions including read, program, and erase; the voltage may vary from 2.7V to 3.6V (Section 2.10). |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Cypress Semicon |
| Package | WSON-8-EP(6x8) |
| Category | Memory |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature (Plastic Packages) | -65 | 150 | °C | 24 | |||
| Ambient Temperature with Power Applied | -65 | 125 | °C | 24 | |||
| VCC supply voltage | VCC | -0.5 | 4 | V | 24 | ||
| VIO supply voltage | VIO | -0.5 | 4 | V | VIO must be <= VCC + 200 mV | 24 | |
| Input voltage with respect to ground (VSS) | -0.5 | 0.5 | V (max = VIO + 0.5 V) | See input signal overshoot section for transient limits | 24 | ||
| Output short circuit current | 100 | mA | No more than one output shorted to ground at a time; duration not greater than 1 s | 24 | |||
| VCC operating range | VCC | 2.7 | 3.6 | V | 24 | ||
| Ambient temperature, Industrial (I) | TA | -40 | 85 | °C | Industrial (I) grade, this MPN | 24 | |
| VCC (Minimum Operation Voltage) | VCC (min) | 2.7 | V | 25 | |||
| VCC (Cut Off Where Re-initialization is Needed) | VCC (cut-off) | 2.4 | V | 25 | |||
| VCC (Low Voltage for Initialization to Occur) | VCC (low) | 1.6 | V | 25 | |||
| VCC (Low Voltage for Initialization to Occur at Embedded) | VCC (low, embedded) | 2.3 | V | Embedded algorithm case | 25 | ||
| VCC (min) to Read Operation (power-up time) | tPU | 300 | µs | From VCC (min) to read operation | 25 | ||
| VCC (low) time (power-down time) | tPD | 15 | µs | VCC (low) duration | 25 | ||
| Input Low Voltage | VIL | -0.5 | 0.2 | V (max = 0.2 x VIO) | Industrial temp -40 to +85 C; max printed as 0.2 x VIO | 26 | |
| Input High Voltage | VIH | 0.7 | 0.4 | x VIO (min); V above VIO (max) | Industrial temp -40 to +85 C; min printed as 0.7 x VIO, max as VIO + 0.4 V | 26 | |
| Output Low Voltage | VOL | 0.15 | x VIO | IOL = 1.6 mA, VCC = VCC min | 26 | ||
| Output High Voltage | VOH | 0.85 | x VIO | IOH = -0.1 mA | 26 | ||
| Input Leakage Current | ILI | -2 | 2 | µA | VCC = VCC Max, VIN = VIH or VIL | 26 | |
| Output Leakage Current | ILO | -2 | 2 | µA | VCC = VCC Max, VIN = VIH or VIL | 26 | |
| Active Power Supply Current (READ) Serial SDR@50 MHz | ICC1 | 16 | mA | Serial SDR@50 MHz; outputs unconnected during read data return | 26 | ||
| Active Power Supply Current (READ) Serial SDR@133 MHz | ICC1 | 33 | mA | Serial SDR@133 MHz; outputs unconnected during read data return | 26 | ||
| Active Power Supply Current (READ) Quad SDR@80 MHz | ICC1 | 50 | mA | Quad SDR@80 MHz; outputs unconnected during read data return | 26 | ||
| Active Power Supply Current (READ) Quad SDR@104 MHz | ICC1 | 61 | mA | Quad SDR@104 MHz; outputs unconnected during read data return | 26 | ||
| Active Power Supply Current (Page Program) | ICC2 | 100 | mA | CS# = VIO | 26 | ||
| Active Power Supply Current (WRR) | ICC3 | 100 | mA | CS# = VIO | 26 | ||
| Active Power Supply Current (SE) | ICC4 | 100 | mA | CS# = VIO | 26 | ||
| Active Power Supply Current (BE) | ICC5 | 100 | mA | CS# = VIO | 26 | ||
| Standby Current (Industrial) | ISB (Industrial) | 70 | 100 | µA | RESET#, CS# = VIO; SI, SCK = VIO or VSS; Industrial temp | 26 | |
| SCK clock frequency for READ and 4READ | FSCK,R | 50 | MHz | READ, 4READ instructions; min printed as DC | 31 | ||
| SCK clock frequency for single commands | FSCK,C | 133 | MHz | Single commands in Table 44; min printed as DC | 31 | ||
| SCK clock frequency for dual and quad commands | FSCK,C | 104 | MHz | DOR, 4DOR, QOR, 4QOR, DIOR, 4DIOR, QIOR, 4QIOR; min printed as DC | 31 | ||
| SCK clock frequency for QPP and 4QPP | FSCK,QPP | 80 | MHz | QPP, 4QPP commands; min printed as DC | 31 | ||
| Clock high time | tWH, tCH | 45 | % PSCK | Footnote 26: ±10% duty cycle supported at lower frequencies | 31 | ||
| Clock low time | tWL, tCL | 45 | % PSCK | Footnote 26: ±10% duty cycle supported at lower frequencies | 31 | ||
| Clock rise time (slew rate) | tCRT, tCLCH | 0.1 | V/ns | 31 | |||
| Clock fall time (slew rate) | tCFT, tCHCL | 0.1 | V/ns | 31 | |||
| CS# High Time (Read Instructions) | tCS | 10 | ns | Read instructions | 31 | ||
| CS# High Time (Program/Erase) | tCS | 50 | ns | Program/Erase | 31 | ||
| CS# Active Setup Time (relative to SCK) | tCSS | 3 | ns | 31 | |||
| CS# Active Hold Time (relative to SCK) | tCSH | 3 | ns | 31 | |||
| Data in Setup Time | tSU | 1.5 | 3000 | ns | Max only applies during Program/Erase Suspend/Resume commands | 31 | |
| Data in Hold Time | tHD | 2 | ns | 31 | |||
| Clock Low to Output Valid (full VCC range) | tV | 8 | ns | Full VCC range 2.7-3.6 V, CL = 30 pF | 31 | ||
| Clock Low to Output Valid (regulated VCC) | tV | 7.65 | ns | Regulated VCC 3.0-3.6 V, CL = 30 pF | 31 | ||
| Clock Low to Output Valid (regulated VCC, 15 pF) | tV | 6.5 | ns | Regulated VCC 3.0-3.6 V, CL = 15 pF | 31 | ||
| Output Hold Time | tHO | 2 | ns | 31 | |||
| Output Disable Time | tDIS | 0 | 8 | ns | 31 | ||
| WP# Setup Time | tWPS | 20 | ns | Only applicable for WRR when SRWD = 1 | 31 | ||
| WP# Hold Time | tWPH | 100 | ns | Only applicable for WRR when SRWD = 1 | 31 | ||
| HOLD# Active Setup Time (relative to SCK) | tHLCH | 3 | ns | 31 | |||
| HOLD# Active Hold Time (relative to SCK) | tCHHH | 3 | ns | 31 | |||
| HOLD# Non Active Setup Time (relative to SCK) | tHHCH | 3 | ns | 31 | |||
| HOLD# Non Active Hold Time (relative to SCK) | tCHHL | 3 | ns | 31 | |||
| HOLD# enable to Output Invalid | tHZ | 8 | ns | 31 | |||
| HOLD# disable to Output Valid | tLZ | 8 | ns | 31 | |||
| Input Capacitance (SCK, CS#, RESET#) | CIN | 8 | pF | 1 MHz | 29 | ||
| Output Capacitance (all I/O) | COUT | 8 | pF | 1 MHz | 29 | ||
| Thermal resistance, junction to ambient (WSON WNG008), S25FL256 | Theta JA | 27 | °C/W | Junction to ambient, WNG008 (WSON 8-contact 6x8) column, S25FL256 row | 24 |
CAD (KiCad official)
- Symbol:
S25FL256SAGNFI000 - Footprint:
Package_SON:WSON-8-1EP_8x6mm_P1.27mm_EP3.4x4.3mm - 3D model: WSON-8-EP(6x8), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
s25fl256sagnfi000-etched.step/s25fl256sagnfi000-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s25fl256sagnfi000.step/s25fl256sagnfi000.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Cypress Semicon datasheet (147 pp, sha256
397c9c5f636021b6, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).